llvm-project/llvm/lib/Target/ARM/ARMScheduleV6.td

//===- ARMScheduleV6.td - ARM v6 Scheduling Definitions ----*- tablegen -*-===//
// 
//                     The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
// 
//===----------------------------------------------------------------------===//
//
// This file defines the itinerary class data for the ARM v6 processors.
//
//===----------------------------------------------------------------------===//

// TODO: Add model for an ARM11
Fix comment. llvm-svn: 76693 2009-07-22 07:54:22 +08:00			`//===- ARMScheduleV6.td - ARM v6 Scheduling Definitions ----- tablegen --===//`
Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits. llvm-svn: 73747 2009-06-19 09:51:50 +08:00			`//`
			`// The LLVM Compiler Infrastructure`
			`//`
			`// This file is distributed under the University of Illinois Open Source`
			`// License. See LICENSE.TXT for details.`
			`//`
			`//===----------------------------------------------------------------------===//`
			`//`
			`// This file defines the itinerary class data for the ARM v6 processors.`
			`//`
			`//===----------------------------------------------------------------------===//`

Checkpoint NEON scheduling itineraries. llvm-svn: 82657 2009-09-24 05:38:08 +08:00			`// TODO: Add model for an ARM11`