2016-09-24 02:38:15 +08:00
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//===-- ResetMachineFunctionPass.cpp - Reset Machine Function ----*- C++ -*-==//
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2016-08-27 08:18:31 +08:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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2016-09-24 02:38:15 +08:00
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/// \file
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/// This file implements a pass that will conditionally reset a machine
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/// function as if it was just created. This is used to provide a fallback
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/// mechanism when GlobalISel fails, thus the condition for the reset to
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/// happen is that the MachineFunction has the FailedISel property.
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2016-08-27 08:18:31 +08:00
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//===----------------------------------------------------------------------===//
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[GlobalISel] Print/Parse FailedISel MachineFunction property
FailedISel MachineFunction property is part of the CodeGen pipeline
state as much as every other property, notably, Legalized,
RegBankSelected, and Selected. Let's make that part of the state also
serializable / de-serializable, so if GlobalISel aborts on some of the
functions of a large module, but not the others, it could be easily seen
and the state of the pipeline could be maintained through llc's
invocations with -stop-after / -start-after.
To make MIR printable and generally to not to break it too much too
soon, this patch also defers cleaning up the vreg -> LLT map until
ResetMachineFunctionPass.
To make MIR with FailedISel: true also machine verifiable, machine
verifier is changed so it treats a MIR-module as non-regbankselected and
non-selected if there is FailedISel property set.
Reviewers: qcolombet, ab
Reviewed By: dsanders
Subscribers: javed.absar, rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D42877
llvm-svn: 326343
2018-03-01 01:55:45 +08:00
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#include "llvm/ADT/ScopeExit.h"
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2016-09-24 02:38:13 +08:00
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#include "llvm/ADT/Statistic.h"
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2016-08-27 08:18:31 +08:00
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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[GlobalISel] Print/Parse FailedISel MachineFunction property
FailedISel MachineFunction property is part of the CodeGen pipeline
state as much as every other property, notably, Legalized,
RegBankSelected, and Selected. Let's make that part of the state also
serializable / de-serializable, so if GlobalISel aborts on some of the
functions of a large module, but not the others, it could be easily seen
and the state of the pipeline could be maintained through llc's
invocations with -stop-after / -start-after.
To make MIR printable and generally to not to break it too much too
soon, this patch also defers cleaning up the vreg -> LLT map until
ResetMachineFunctionPass.
To make MIR with FailedISel: true also machine verifiable, machine
verifier is changed so it treats a MIR-module as non-regbankselected and
non-selected if there is FailedISel property set.
Reviewers: qcolombet, ab
Reviewed By: dsanders
Subscribers: javed.absar, rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D42877
llvm-svn: 326343
2018-03-01 01:55:45 +08:00
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2017-06-06 19:49:48 +08:00
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#include "llvm/CodeGen/Passes.h"
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2016-09-01 02:43:01 +08:00
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#include "llvm/IR/DiagnosticInfo.h"
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2016-08-27 08:18:31 +08:00
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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#define DEBUG_TYPE "reset-machine-function"
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2016-09-24 02:38:13 +08:00
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STATISTIC(NumFunctionsReset, "Number of functions reset");
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2016-08-27 08:18:31 +08:00
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namespace {
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class ResetMachineFunction : public MachineFunctionPass {
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2016-09-01 02:43:01 +08:00
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/// Tells whether or not this pass should emit a fallback
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/// diagnostic when it resets a function.
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bool EmitFallbackDiag;
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2017-01-14 07:46:11 +08:00
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/// Whether we should abort immediately instead of resetting the function.
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bool AbortOnFailedISel;
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2016-09-01 02:43:01 +08:00
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2016-08-27 08:18:31 +08:00
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public:
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static char ID; // Pass identification, replacement for typeid
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ResetMachineFunction(bool EmitFallbackDiag = false,
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bool AbortOnFailedISel = false)
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: MachineFunctionPass(ID), EmitFallbackDiag(EmitFallbackDiag),
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AbortOnFailedISel(AbortOnFailedISel) {}
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2016-08-27 08:18:31 +08:00
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2016-10-01 10:56:57 +08:00
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StringRef getPassName() const override { return "ResetMachineFunction"; }
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2016-08-27 08:18:31 +08:00
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bool runOnMachineFunction(MachineFunction &MF) override {
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[GlobalISel] Print/Parse FailedISel MachineFunction property
FailedISel MachineFunction property is part of the CodeGen pipeline
state as much as every other property, notably, Legalized,
RegBankSelected, and Selected. Let's make that part of the state also
serializable / de-serializable, so if GlobalISel aborts on some of the
functions of a large module, but not the others, it could be easily seen
and the state of the pipeline could be maintained through llc's
invocations with -stop-after / -start-after.
To make MIR printable and generally to not to break it too much too
soon, this patch also defers cleaning up the vreg -> LLT map until
ResetMachineFunctionPass.
To make MIR with FailedISel: true also machine verifiable, machine
verifier is changed so it treats a MIR-module as non-regbankselected and
non-selected if there is FailedISel property set.
Reviewers: qcolombet, ab
Reviewed By: dsanders
Subscribers: javed.absar, rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D42877
llvm-svn: 326343
2018-03-01 01:55:45 +08:00
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// No matter what happened, whether we successfully selected the function
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// or not, nothing is going to use the vreg types after us. Make sure they
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// disappear.
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auto ClearVRegTypesOnReturn =
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make_scope_exit([&MF]() { MF.getRegInfo().getVRegToType().clear(); });
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2016-08-27 08:18:31 +08:00
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if (MF.getProperties().hasProperty(
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MachineFunctionProperties::Property::FailedISel)) {
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2017-01-14 07:46:11 +08:00
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if (AbortOnFailedISel)
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report_fatal_error("Instruction selection failed");
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2018-05-14 20:53:11 +08:00
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LLVM_DEBUG(dbgs() << "Resetting: " << MF.getName() << '\n');
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2016-09-24 02:38:13 +08:00
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++NumFunctionsReset;
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2016-08-27 08:18:31 +08:00
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MF.reset();
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2016-09-01 02:43:01 +08:00
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if (EmitFallbackDiag) {
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2017-12-16 06:22:58 +08:00
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const Function &F = MF.getFunction();
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2016-09-01 02:43:01 +08:00
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DiagnosticInfoISelFallback DiagFallback(F);
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F.getContext().diagnose(DiagFallback);
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}
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2016-08-27 08:18:31 +08:00
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return true;
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}
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return false;
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}
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};
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} // end anonymous namespace
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char ResetMachineFunction::ID = 0;
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INITIALIZE_PASS(ResetMachineFunction, DEBUG_TYPE,
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2018-02-02 09:49:59 +08:00
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"Reset machine function if ISel failed", false, false)
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2016-08-27 08:18:31 +08:00
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MachineFunctionPass *
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2017-01-14 07:46:11 +08:00
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llvm::createResetMachineFunctionPass(bool EmitFallbackDiag = false,
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bool AbortOnFailedISel = false) {
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return new ResetMachineFunction(EmitFallbackDiag, AbortOnFailedISel);
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2016-08-27 08:18:31 +08:00
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}
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