forked from OSchip/llvm-project
162 lines
6.4 KiB
LLVM
162 lines
6.4 KiB
LLVM
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; Use the -disable-cfi flag so that we get the compact unwind info in the
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; emitted assembly. Compact unwind info is omitted when CFI directives
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; are emitted.
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;
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; RUN: llc -march=arm64 -mtriple=arm64-apple-ios -disable-cfi < %s | FileCheck %s
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;
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; rdar://13070556
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@bar = common global i32 0, align 4
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; Leaf function with no stack allocation and no saving/restoring
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; of non-volatile registers.
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define i32 @foo1(i32 %a) #0 {
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entry:
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%add = add nsw i32 %a, 42
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ret i32 %add
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}
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; Leaf function with stack allocation but no saving/restoring
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; of non-volatile registers.
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define i32 @foo2(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) #0 {
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entry:
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%stack = alloca [36 x i32], align 4
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv19 = phi i64 [ 0, %entry ], [ %indvars.iv.next20, %for.body ]
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%arrayidx = getelementptr inbounds [36 x i32]* %stack, i64 0, i64 %indvars.iv19
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%0 = trunc i64 %indvars.iv19 to i32
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store i32 %0, i32* %arrayidx, align 4, !tbaa !0
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%indvars.iv.next20 = add i64 %indvars.iv19, 1
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%lftr.wideiv21 = trunc i64 %indvars.iv.next20 to i32
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%exitcond22 = icmp eq i32 %lftr.wideiv21, 36
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br i1 %exitcond22, label %for.body4, label %for.body
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for.body4: ; preds = %for.body, %for.body4
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body4 ], [ 0, %for.body ]
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%z1.016 = phi i32 [ %add, %for.body4 ], [ 0, %for.body ]
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%arrayidx6 = getelementptr inbounds [36 x i32]* %stack, i64 0, i64 %indvars.iv
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%1 = load i32* %arrayidx6, align 4, !tbaa !0
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%add = add nsw i32 %1, %z1.016
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 36
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br i1 %exitcond, label %for.end9, label %for.body4
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for.end9: ; preds = %for.body4
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ret i32 %add
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}
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; Leaf function with no stack allocation but with saving restoring of
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; non-volatile registers.
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define i32 @foo3(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) #1 {
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entry:
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%0 = load volatile i32* @bar, align 4, !tbaa !0
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%1 = load volatile i32* @bar, align 4, !tbaa !0
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%2 = load volatile i32* @bar, align 4, !tbaa !0
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%3 = load volatile i32* @bar, align 4, !tbaa !0
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%4 = load volatile i32* @bar, align 4, !tbaa !0
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%5 = load volatile i32* @bar, align 4, !tbaa !0
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%6 = load volatile i32* @bar, align 4, !tbaa !0
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%7 = load volatile i32* @bar, align 4, !tbaa !0
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%8 = load volatile i32* @bar, align 4, !tbaa !0
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%9 = load volatile i32* @bar, align 4, !tbaa !0
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%10 = load volatile i32* @bar, align 4, !tbaa !0
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%11 = load volatile i32* @bar, align 4, !tbaa !0
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%12 = load volatile i32* @bar, align 4, !tbaa !0
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%13 = load volatile i32* @bar, align 4, !tbaa !0
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%14 = load volatile i32* @bar, align 4, !tbaa !0
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%15 = load volatile i32* @bar, align 4, !tbaa !0
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%16 = load volatile i32* @bar, align 4, !tbaa !0
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%17 = load volatile i32* @bar, align 4, !tbaa !0
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%factor = mul i32 %h, -2
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%factor56 = mul i32 %g, -2
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%factor57 = mul i32 %f, -2
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%factor58 = mul i32 %e, -2
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%factor59 = mul i32 %d, -2
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%factor60 = mul i32 %c, -2
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%factor61 = mul i32 %b, -2
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%sum = add i32 %1, %0
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%sum62 = add i32 %sum, %2
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%sum63 = add i32 %sum62, %3
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%sum64 = add i32 %sum63, %4
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%sum65 = add i32 %sum64, %5
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%sum66 = add i32 %sum65, %6
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%sum67 = add i32 %sum66, %7
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%sum68 = add i32 %sum67, %8
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%sum69 = add i32 %sum68, %9
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%sum70 = add i32 %sum69, %10
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%sum71 = add i32 %sum70, %11
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%sum72 = add i32 %sum71, %12
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%sum73 = add i32 %sum72, %13
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%sum74 = add i32 %sum73, %14
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%sum75 = add i32 %sum74, %15
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%sum76 = add i32 %sum75, %16
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%sub10 = sub i32 %17, %sum76
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%sub11 = add i32 %sub10, %factor
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%sub12 = add i32 %sub11, %factor56
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%sub13 = add i32 %sub12, %factor57
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%sub14 = add i32 %sub13, %factor58
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%sub15 = add i32 %sub14, %factor59
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%sub16 = add i32 %sub15, %factor60
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%add = add i32 %sub16, %factor61
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ret i32 %add
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}
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; Leaf function with stack allocation and saving/restoring of non-volatile
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; registers.
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define i32 @foo4(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) #0 {
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entry:
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%stack = alloca [128 x i32], align 4
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%0 = zext i32 %a to i64
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br label %for.body
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for.cond2.preheader: ; preds = %for.body
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%1 = sext i32 %f to i64
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br label %for.body4
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for.body: ; preds = %for.body, %entry
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%indvars.iv22 = phi i64 [ 0, %entry ], [ %indvars.iv.next23, %for.body ]
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%2 = add nsw i64 %indvars.iv22, %0
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%arrayidx = getelementptr inbounds [128 x i32]* %stack, i64 0, i64 %indvars.iv22
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%3 = trunc i64 %2 to i32
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store i32 %3, i32* %arrayidx, align 4, !tbaa !0
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%indvars.iv.next23 = add i64 %indvars.iv22, 1
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%lftr.wideiv25 = trunc i64 %indvars.iv.next23 to i32
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%exitcond26 = icmp eq i32 %lftr.wideiv25, 128
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br i1 %exitcond26, label %for.cond2.preheader, label %for.body
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for.body4: ; preds = %for.body4, %for.cond2.preheader
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%indvars.iv = phi i64 [ 0, %for.cond2.preheader ], [ %indvars.iv.next, %for.body4 ]
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%z1.018 = phi i32 [ 0, %for.cond2.preheader ], [ %add8, %for.body4 ]
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%4 = add nsw i64 %indvars.iv, %1
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%arrayidx7 = getelementptr inbounds [128 x i32]* %stack, i64 0, i64 %4
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%5 = load i32* %arrayidx7, align 4, !tbaa !0
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%add8 = add nsw i32 %5, %z1.018
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 128
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br i1 %exitcond, label %for.end11, label %for.body4
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for.end11: ; preds = %for.body4
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ret i32 %add8
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}
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attributes #0 = { readnone "target-cpu"="cyclone" }
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attributes #1 = { "target-cpu"="cyclone" }
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!0 = metadata !{metadata !"int", metadata !1}
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!1 = metadata !{metadata !"omnipotent char", metadata !2}
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!2 = metadata !{metadata !"Simple C/C++ TBAA"}
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; CHECK: .section __LD,__compact_unwind,regular,debug
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; CHECK: .quad _foo1 ; Range Start
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; CHECK: .long 33554432 ; Compact Unwind Encoding: 0x2000000
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; CHECK: .quad _foo2 ; Range Start
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; CHECK: .long 33591296 ; Compact Unwind Encoding: 0x2009000
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; CHECK: .quad _foo3 ; Range Start
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; CHECK: .long 33570831 ; Compact Unwind Encoding: 0x200400f
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; CHECK: .quad _foo4 ; Range Start
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; CHECK: .long 33689616 ; Compact Unwind Encoding: 0x2021010
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