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llvm-project/llvm/test/CodeGen/SystemZ/subregliveness-02.ll

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[RegAlloc] Check that subreg liveness tracking applies to given virtual reg Subregister liveness applies selectively to register classes with certain properties. Make sure that when it's enabled, it applies to a given virtual register (in virtual register rewriter). llvm-svn: 339784
2018-08-16 00:07:47 +08:00
; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -systemz-subreg-liveness < %s | FileCheck %s
; Check for successful compilation.
[SystemZ] Use VGM whenever possible to load FP immediates. isFPImmLegal() has been extended to recognize certain FP immediates that can be built with VGM (Vector Generate Mask). These scalar FP immediates (that were previously loaded from the constant pool) are now selected as VGMF/VGMG in Select(). Review: Ulrich Weigand https://reviews.llvm.org/D58003 llvm-svn: 353867
2019-02-13 02:06:06 +08:00
; CHECK: meebr %f1, %f0
[RegAlloc] Check that subreg liveness tracking applies to given virtual reg Subregister liveness applies selectively to register classes with certain properties. Make sure that when it's enabled, it applies to a given virtual register (in virtual register rewriter). llvm-svn: 339784
2018-08-16 00:07:47 +08:00
target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
target triple = "s390x-ibm-linux"
; Function Attrs: nounwind
define void @spec_random_load() #0 {
bb:
%tmp = sitofp i64 undef to float
%tmp1 = fmul float %tmp, 0x3E00000000000000
%tmp2 = fpext float %tmp1 to double
%tmp3 = fmul double %tmp2, 2.560000e+02
%tmp4 = fptosi double %tmp3 to i32
%tmp5 = trunc i32 %tmp4 to i8
store i8 %tmp5, i8* undef, align 1
unreachable
}
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="z13" "target-features"="+transactional-execution,+vector" "unsafe-fp-math"="false" "use-soft-float"="false" }