forked from OSchip/llvm-project
385 lines
13 KiB
LLVM
385 lines
13 KiB
LLVM
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; Test that DAGCombiner gets helped by computeKnownBitsForTargetNode() with
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; vector intrinsics.
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;
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; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s
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declare <8 x i16> @llvm.s390.vuphb(<16 x i8>)
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declare <8 x i16> @llvm.s390.vuplhb(<16 x i8>)
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; VUPHB (used operand elements are 0)
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define <8 x i16> @f0() {
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; CHECK-LABEL: f0:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <8 x i16> @llvm.s390.vuphb(<16 x i8>
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<i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
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i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
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%and = and <8 x i16> %unp, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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ret <8 x i16> %and
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}
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; VUPHB (used operand elements are 1)
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; NOTE: The AND is optimized away, but instead of replicating '1' into <8 x
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; i16>, the original vector constant is put in the constant pool and then
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; unpacked (repeated in more test cases below).
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define <8 x i16> @f1() {
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; CHECK-LABEL: f1:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vuphb %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <8 x i16> @llvm.s390.vuphb(<16 x i8>
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<i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
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i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
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%and = and <8 x i16> %unp, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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ret <8 x i16> %and
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}
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; VUPLHB (used operand elements are 0)
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define <8 x i16> @f2() {
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; CHECK-LABEL: f2:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <8 x i16> @llvm.s390.vuplhb(<16 x i8>
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<i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
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i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
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%and = and <8 x i16> %unp, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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ret <8 x i16> %and
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}
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; VUPLHB (used operand elements are 1)
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define <8 x i16> @f3() {
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; CHECK-LABEL: f3:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vuplhb %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <8 x i16> @llvm.s390.vuplhb(<16 x i8>
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<i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
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i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
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%and = and <8 x i16> %unp, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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ret <8 x i16> %and
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}
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declare <4 x i32> @llvm.s390.vuphh(<8 x i16>)
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declare <4 x i32> @llvm.s390.vuplhh(<8 x i16>)
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; VUPHH (used operand elements are 0)
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define <4 x i32> @f4() {
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; CHECK-LABEL: f4:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <4 x i32> @llvm.s390.vuphh(<8 x i16>
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<i16 0, i16 0, i16 0, i16 0,
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i16 1, i16 1, i16 1, i16 1>)
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%and = and <4 x i32> %unp, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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; VUPHH (used operand elements are 1)
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define <4 x i32> @f5() {
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; CHECK-LABEL: f5:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vuphh %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <4 x i32> @llvm.s390.vuphh(<8 x i16>
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<i16 1, i16 1, i16 1, i16 1,
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i16 0, i16 0, i16 0, i16 0>)
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%and = and <4 x i32> %unp, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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; VUPLHH (used operand elements are 0)
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define <4 x i32> @f6() {
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; CHECK-LABEL: f6:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <4 x i32> @llvm.s390.vuplhh(<8 x i16>
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<i16 0, i16 0, i16 0, i16 0,
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i16 1, i16 1, i16 1, i16 1>)
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%and = and <4 x i32> %unp, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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; VUPLHH (used operand elements are 1)
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define <4 x i32> @f7() {
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; CHECK-LABEL: f7:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vuplhh %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <4 x i32> @llvm.s390.vuplhh(<8 x i16>
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<i16 1, i16 1, i16 1, i16 1,
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i16 0, i16 0, i16 0, i16 0>)
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%and = and <4 x i32> %unp, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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declare <2 x i64> @llvm.s390.vuphf(<4 x i32>)
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declare <2 x i64> @llvm.s390.vuplhf(<4 x i32>)
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; VUPHF (used operand elements are 0)
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define <2 x i64> @f8() {
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; CHECK-LABEL: f8:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <2 x i64> @llvm.s390.vuphf(<4 x i32> <i32 0, i32 0, i32 1, i32 1>)
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%and = and <2 x i64> %unp, <i64 1, i64 1>
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ret <2 x i64> %and
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}
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; VUPHF (used operand elements are 1)
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define <2 x i64> @f9() {
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; CHECK-LABEL: f9:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vuphf %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <2 x i64> @llvm.s390.vuphf(<4 x i32> <i32 1, i32 1, i32 0, i32 0>)
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%and = and <2 x i64> %unp, <i64 1, i64 1>
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ret <2 x i64> %and
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}
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; VUPLHF (used operand elements are 0)
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define <2 x i64> @f10() {
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; CHECK-LABEL: f10:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <2 x i64> @llvm.s390.vuplhf(<4 x i32> <i32 0, i32 0, i32 1, i32 1>)
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%and = and <2 x i64> %unp, <i64 1, i64 1>
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ret <2 x i64> %and
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}
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; VUPLHF (used operand elements are 1)
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define <2 x i64> @f11() {
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; CHECK-LABEL: f11:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vuplhf %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <2 x i64> @llvm.s390.vuplhf(<4 x i32> <i32 1, i32 1, i32 0, i32 0>)
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%and = and <2 x i64> %unp, <i64 1, i64 1>
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ret <2 x i64> %and
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}
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declare <8 x i16> @llvm.s390.vuplb(<16 x i8>)
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declare <8 x i16> @llvm.s390.vupllb(<16 x i8>)
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; VUPLB (used operand elements are 0)
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define <8 x i16> @f12() {
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; CHECK-LABEL: f12:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <8 x i16> @llvm.s390.vuplb(<16 x i8>
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<i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
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i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
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%and = and <8 x i16> %unp, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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ret <8 x i16> %and
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}
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; VUPLB (used operand elements are 1)
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define <8 x i16> @f13() {
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; CHECK-LABEL: f13:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vuplb %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <8 x i16> @llvm.s390.vuplb(<16 x i8>
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<i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
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i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
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%and = and <8 x i16> %unp, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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ret <8 x i16> %and
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}
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; VUPLLB (used operand elements are 0)
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define <8 x i16> @f14() {
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; CHECK-LABEL: f14:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <8 x i16> @llvm.s390.vupllb(<16 x i8>
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<i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
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i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
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%and = and <8 x i16> %unp, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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ret <8 x i16> %and
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}
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; VUPLLB (used operand elements are 1)
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define <8 x i16> @f15() {
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; CHECK-LABEL: f15:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vupllb %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <8 x i16> @llvm.s390.vupllb(<16 x i8>
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<i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
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i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
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%and = and <8 x i16> %unp, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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ret <8 x i16> %and
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}
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declare <4 x i32> @llvm.s390.vuplhw(<8 x i16>)
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declare <4 x i32> @llvm.s390.vupllh(<8 x i16>)
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; VUPLHW (used operand elements are 0)
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define <4 x i32> @f16() {
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; CHECK-LABEL: f16:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <4 x i32> @llvm.s390.vuplhw(<8 x i16>
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<i16 1, i16 1, i16 1, i16 1,
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i16 0, i16 0, i16 0, i16 0>)
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%and = and <4 x i32> %unp, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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; VUPLHW (used operand elements are 1)
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define <4 x i32> @f17() {
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; CHECK-LABEL: f17:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vuplhw %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <4 x i32> @llvm.s390.vuplhw(<8 x i16>
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<i16 0, i16 0, i16 0, i16 0,
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i16 1, i16 1, i16 1, i16 1>)
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%and = and <4 x i32> %unp, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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; VUPLLH (used operand elements are 0)
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define <4 x i32> @f18() {
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; CHECK-LABEL: f18:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <4 x i32> @llvm.s390.vupllh(<8 x i16>
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<i16 1, i16 1, i16 1, i16 1,
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i16 0, i16 0, i16 0, i16 0>)
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%and = and <4 x i32> %unp, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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; VUPLLH (used operand elements are 1)
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define <4 x i32> @f19() {
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; CHECK-LABEL: f19:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vupllh %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <4 x i32> @llvm.s390.vupllh(<8 x i16>
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<i16 0, i16 0, i16 0, i16 0,
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i16 1, i16 1, i16 1, i16 1>)
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%and = and <4 x i32> %unp, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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declare <2 x i64> @llvm.s390.vuplf(<4 x i32>)
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declare <2 x i64> @llvm.s390.vupllf(<4 x i32>)
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; VUPLF (used operand elements are 0)
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define <2 x i64> @f20() {
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; CHECK-LABEL: f20:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: vgbm %v24, 0
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; CHECK-NEXT: br %r14
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%unp = call <2 x i64> @llvm.s390.vuplf(<4 x i32> <i32 1, i32 1, i32 0, i32 0>)
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%and = and <2 x i64> %unp, <i64 1, i64 1>
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ret <2 x i64> %and
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}
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; VUPLF (used operand elements are 1)
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define <2 x i64> @f21() {
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; CHECK-LABEL: f21:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI
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; CHECK-NEXT: vl %v0, 0(%r1)
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; CHECK-NEXT: vuplf %v24, %v0
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; CHECK-NEXT: br %r14
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%unp = call <2 x i64> @llvm.s390.vuplf(<4 x i32> <i32 0, i32 0, i32 1, i32 1>)
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%and = and <2 x i64> %unp, <i64 1, i64 1>
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ret <2 x i64> %and
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}
|
||
|
|
||
|
; VUPLLF (used operand elements are 0)
|
||
|
define <2 x i64> @f22() {
|
||
|
; CHECK-LABEL: f22:
|
||
|
; CHECK-LABEL: # %bb.0:
|
||
|
; CHECK-NEXT: vgbm %v24, 0
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%unp = call <2 x i64> @llvm.s390.vupllf(<4 x i32> <i32 1, i32 1, i32 0, i32 0>)
|
||
|
%and = and <2 x i64> %unp, <i64 1, i64 1>
|
||
|
ret <2 x i64> %and
|
||
|
}
|
||
|
|
||
|
; VUPLLF (used operand elements are 1)
|
||
|
define <2 x i64> @f23() {
|
||
|
; CHECK-LABEL: f23:
|
||
|
; CHECK-LABEL: # %bb.0:
|
||
|
; CHECK-NEXT: larl %r1, .LCPI
|
||
|
; CHECK-NEXT: vl %v0, 0(%r1)
|
||
|
; CHECK-NEXT: vupllf %v24, %v0
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%unp = call <2 x i64> @llvm.s390.vupllf(<4 x i32> <i32 0, i32 0, i32 1, i32 1>)
|
||
|
%and = and <2 x i64> %unp, <i64 1, i64 1>
|
||
|
ret <2 x i64> %and
|
||
|
}
|
||
|
|
||
|
; Test that signed unpacking of positive elements gives known zeros in high part.
|
||
|
define <2 x i64> @f24() {
|
||
|
; CHECK-LABEL: f24:
|
||
|
; CHECK-LABEL: # %bb.0:
|
||
|
; CHECK-NEXT: vgbm %v24, 0
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%unp = call <2 x i64> @llvm.s390.vuphf(<4 x i32> <i32 1, i32 1, i32 0, i32 0>)
|
||
|
%and = and <2 x i64> %unp, <i64 -4294967296, ; = 0xffffffff00000000
|
||
|
i64 -4294967296>
|
||
|
ret <2 x i64> %and
|
||
|
}
|
||
|
|
||
|
; Test that signed unpacking of negative elements gives known ones in high part.
|
||
|
define <2 x i64> @f25() {
|
||
|
; CHECK-LABEL: f25:
|
||
|
; CHECK-LABEL: # %bb.0:
|
||
|
; 61680 = 0xf0f0
|
||
|
; CHECK-NEXT: vgbm %v24, 61680
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%unp = call <2 x i64> @llvm.s390.vuphf(<4 x i32> <i32 -1, i32 -1, i32 0, i32 0>)
|
||
|
%and = and <2 x i64> %unp, <i64 -4294967296, ; = 0xffffffff00000000
|
||
|
i64 -4294967296>
|
||
|
ret <2 x i64> %and
|
||
|
}
|
||
|
|
||
|
; Test that logical unpacking of negative elements gives known zeros in high part.
|
||
|
define <2 x i64> @f26() {
|
||
|
; CHECK-LABEL: f26:
|
||
|
; CHECK-LABEL: # %bb.0:
|
||
|
; CHECK-NEXT: vgbm %v24, 0
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%unp = call <2 x i64> @llvm.s390.vuplhf(<4 x i32> <i32 -1, i32 -1, i32 0, i32 0>)
|
||
|
%and = and <2 x i64> %unp, <i64 -4294967296, ; = 0xffffffff00000000
|
||
|
i64 -4294967296>
|
||
|
ret <2 x i64> %and
|
||
|
}
|