forked from OSchip/llvm-project
69 lines
2.5 KiB
LLVM
69 lines
2.5 KiB
LLVM
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -join-liveintervals=false -verify-machineinstrs | FileCheck %s
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;
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; Check that copyPhysReg() properly adds impl-use operands of the super
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; register while lowering a COPY of a GR128 bit reg.
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define void @autogen_SD5585(i32*, i64) {
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; CHECK: .text
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BB:
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%L5 = load i1, i1* undef
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%I8 = insertelement <8 x i64> undef, i64 %1, i32 3
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%I21 = insertelement <8 x i64> zeroinitializer, i64 475435, i32 5
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br label %CF290
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CF290: ; preds = %CF290, %BB
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%B29 = urem <8 x i64> %I8, %I21
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%Cmp31 = icmp sge i1 undef, undef
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br i1 %Cmp31, label %CF290, label %CF296
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CF296: ; preds = %CF290
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%FC36 = sitofp <8 x i64> %B29 to <8 x double>
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br label %CF302
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CF302: ; preds = %CF307, %CF296
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%Shuff49 = shufflevector <8 x i64> undef, <8 x i64> zeroinitializer, <8 x i32> <i32 undef, i32 9, i32 11, i32 undef, i32 15, i32 1, i32 3, i32 5>
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%L69 = load i16, i16* undef
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br label %CF307
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CF307: ; preds = %CF302
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%Cmp84 = icmp ne i16 undef, %L69
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br i1 %Cmp84, label %CF302, label %CF301
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CF301: ; preds = %CF307
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%B126 = or i32 514315, undef
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br label %CF280
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CF280: ; preds = %CF280, %CF301
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%I139 = insertelement <8 x i64> %Shuff49, i64 undef, i32 2
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%B155 = udiv <8 x i64> %I8, %I139
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%Cmp157 = icmp ne i64 -1, undef
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br i1 %Cmp157, label %CF280, label %CF281
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CF281: ; preds = %CF280
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%Cmp164 = icmp slt i1 %L5, %Cmp84
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br label %CF282
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CF282: ; preds = %CF304, %CF281
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br label %CF289
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CF289: ; preds = %CF289, %CF282
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store i32 %B126, i32* %0
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%Cmp219 = icmp slt i64 undef, undef
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br i1 %Cmp219, label %CF289, label %CF304
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CF304: ; preds = %CF289
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%Cmp234 = icmp ult i64 0, undef
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br i1 %Cmp234, label %CF282, label %CF283
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CF283: ; preds = %CF308, %CF283, %CF304
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%E251 = extractelement <8 x i64> %B155, i32 0
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br i1 undef, label %CF283, label %CF308
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CF308: ; preds = %CF283
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store i1 %Cmp164, i1* undef
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br i1 undef, label %CF283, label %CF293
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CF293: ; preds = %CF308
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ret void
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}
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