forked from OSchip/llvm-project
26 lines
850 B
C
26 lines
850 B
C
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// REQUIRES: hexagon-registered-target
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// RUN: %clang_cc1 -triple hexagon %s -target-feature +hvx-length128b -target-feature +hvxv60 -target-cpu hexagonv60 -fsyntax-only -verify
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typedef long Vect1024 __attribute__((__vector_size__(128)))
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__attribute__((aligned(128)));
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typedef long Vect2048 __attribute__((__vector_size__(256)))
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__attribute__((aligned(128)));
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typedef Vect1024 HVX_Vector;
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typedef Vect2048 HVX_VectorPair;
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HVX_Vector builtin_needs_v60(HVX_VectorPair a) {
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return __builtin_HEXAGON_V6_hi_128B(a);
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}
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HVX_Vector builtin_needs_v62(char a) {
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// expected-error@+1 {{builtin is not supported on this version of HVX}}
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return __builtin_HEXAGON_V6_lvsplatb_128B(a);
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}
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HVX_VectorPair builtin_needs_v65() {
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// expected-error@+1 {{builtin is not supported on this version of HVX}}
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return __builtin_HEXAGON_V6_vdd0_128B();
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}
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