2016-03-26 04:12:25 +08:00
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; NOTE: Assertions have been autogenerated by update_test_checks.py
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2015-11-11 02:46:14 +08:00
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; RUN: opt -S -instsimplify < %s | FileCheck %s
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define i1 @test(i32 %a) {
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2016-03-26 04:12:25 +08:00
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; CHECK-LABEL: @test(
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; CHECK: ret i1 false
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;
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2015-11-11 02:46:14 +08:00
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%rhs = add i32 %a, -1
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%and = and i32 %a, %rhs
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%res = icmp eq i32 %and, 1
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ret i1 %res
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}
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define i1 @test2(i32 %a) {
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2016-03-26 04:12:25 +08:00
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; CHECK-LABEL: @test2(
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; CHECK: ret i1 false
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;
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2015-11-11 02:46:14 +08:00
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%rhs = add i32 %a, 1
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%and = and i32 %a, %rhs
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%res = icmp eq i32 %and, 1
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ret i1 %res
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}
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define i1 @test3(i32 %a) {
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2016-03-26 04:12:25 +08:00
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; CHECK-LABEL: @test3(
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; CHECK: ret i1 false
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;
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2015-11-11 02:46:14 +08:00
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%rhs = add i32 %a, 7
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%and = and i32 %a, %rhs
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%res = icmp eq i32 %and, 1
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ret i1 %res
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}
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@B = external global i32
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declare void @llvm.assume(i1)
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; Known bits without a constant
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define i1 @test4(i32 %a) {
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2016-03-26 04:12:25 +08:00
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; CHECK-LABEL: @test4(
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; CHECK: [[B:%.*]] = load i32, i32* @B
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; CHECK-NEXT: [[B_AND:%.*]] = and i32 [[B]], 1
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; CHECK-NEXT: [[B_CND:%.*]] = icmp eq i32 [[B_AND]], 1
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; CHECK-NEXT: call void @llvm.assume(i1 [[B_CND]])
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; CHECK-NEXT: ret i1 false
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;
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2015-11-11 02:46:14 +08:00
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%b = load i32, i32* @B
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%b.and = and i32 %b, 1
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%b.cnd = icmp eq i32 %b.and, 1
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2016-12-19 16:22:17 +08:00
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call void @llvm.assume(i1 %b.cnd)
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2015-11-11 02:46:14 +08:00
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%rhs = add i32 %a, %b
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%and = and i32 %a, %rhs
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%res = icmp eq i32 %and, 1
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ret i1 %res
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}
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; Negative test - even number
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define i1 @test5(i32 %a) {
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2016-03-26 04:12:25 +08:00
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; CHECK-LABEL: @test5(
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; CHECK: [[RHS:%.*]] = add i32 %a, 2
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; CHECK-NEXT: [[AND:%.*]] = and i32 %a, [[RHS]]
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; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[AND]], 1
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; CHECK-NEXT: ret i1 [[RES]]
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;
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2015-11-11 02:46:14 +08:00
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%rhs = add i32 %a, 2
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%and = and i32 %a, %rhs
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%res = icmp eq i32 %and, 1
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ret i1 %res
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}
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define i1 @test6(i32 %a) {
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2016-03-26 04:12:25 +08:00
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; CHECK-LABEL: @test6(
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; CHECK: ret i1 false
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;
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2015-11-11 02:46:14 +08:00
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%lhs = add i32 %a, -1
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%and = and i32 %lhs, %a
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%res = icmp eq i32 %and, 1
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ret i1 %res
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}
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