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llvm-project/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir

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Add an ID field to StackObjects On AMDGPU SGPR spills are really spilled to another register. The spiller creates the spills to new frame index objects, which is used as a placeholder. This will eventually be replaced with a reference to a position in a VGPR to write to and the frame index deleted. It is most likely not a real stack location that can be shared with another stack object. This is a problem when StackSlotColoring decides it should combine a frame index used for a normal VGPR spill with a real stack location and a frame index used for an SGPR. Add an ID field so that StackSlotColoring has a way of knowing the different frame index types are incompatible. llvm-svn: 308673
2017-07-21 05:03:45 +08:00
# RUN: llc -march=amdgcn -run-pass none -o - %s | FileCheck %s
...
---
# CHECK-LABEL: name: spill_slot_stack_id
# CHECK: {{^}}fixedStack:
# CHECK: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: 0,
# CHECK: - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0,
# CHECK: - { id: 2, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 9,
# CHECK: {{^}}stack:
# CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 16,
# CHECK-NEXT: stack-id: 3,
# CHECK: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8,
# CHECK-NEXT: stack-id: 0,
# CHECK: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4,
# CHECK-NEXT: stack-id: 0,
name: spill_slot_stack_id
fixedStack:
- { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 9 }
- { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0 }
- { id: 2, type: spill-slot, offset: 0, size: 4, alignment: 4 }
stack:
- { id: 0, name: '', type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 3 }
- { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0 }
- { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 }
body: |
bb.0:
S_ENDPGM
...