2016-07-14 19:05:43 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-macosx10.9.0 -mattr=+avx | FileCheck %s
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2014-05-30 07:35:33 +08:00
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; Check that we properly upgrade the AVX vbroadcast intrinsics to IR. The
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; expectation is that we should still get the original instruction back that
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; maps to the intrinsic.
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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define <4 x float> @test_mm_broadcast_ss(float* readonly %__a){
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2016-07-14 19:05:43 +08:00
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; CHECK-LABEL: test_mm_broadcast_ss:
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2017-12-05 01:18:51 +08:00
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; CHECK: ## %bb.0: ## %entry
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2016-07-14 19:05:43 +08:00
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; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
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; CHECK-NEXT: retq
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2014-05-30 07:35:33 +08:00
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entry:
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%0 = bitcast float* %__a to i8*
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%1 = tail call <4 x float> @llvm.x86.avx.vbroadcast.ss(i8* %0)
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ret <4 x float> %1
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}
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2016-07-14 19:05:43 +08:00
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declare <8 x float> @llvm.x86.avx.vbroadcast.ss.256(i8*)
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2014-05-30 07:35:33 +08:00
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define <4 x double> @test_mm256_broadcast_sd(double* readonly %__a) {
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2016-07-14 19:05:43 +08:00
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; CHECK-LABEL: test_mm256_broadcast_sd:
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2017-12-05 01:18:51 +08:00
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; CHECK: ## %bb.0: ## %entry
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2016-07-14 19:05:43 +08:00
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; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
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; CHECK-NEXT: retq
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2014-05-30 07:35:33 +08:00
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entry:
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%0 = bitcast double* %__a to i8*
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%1 = tail call <4 x double> @llvm.x86.avx.vbroadcast.sd.256(i8* %0)
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ret <4 x double> %1
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}
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2016-07-14 19:05:43 +08:00
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declare <4 x double> @llvm.x86.avx.vbroadcast.sd.256(i8*)
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2014-05-30 07:35:33 +08:00
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define <8 x float> @test_mm256_broadcast_ss(float* readonly %__a) {
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2016-07-14 19:05:43 +08:00
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; CHECK-LABEL: test_mm256_broadcast_ss:
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2017-12-05 01:18:51 +08:00
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; CHECK: ## %bb.0: ## %entry
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2016-07-14 19:05:43 +08:00
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; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
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; CHECK-NEXT: retq
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2014-05-30 07:35:33 +08:00
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entry:
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%0 = bitcast float* %__a to i8*
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%1 = tail call <8 x float> @llvm.x86.avx.vbroadcast.ss.256(i8* %0)
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ret <8 x float> %1
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}
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declare <4 x float> @llvm.x86.avx.vbroadcast.ss(i8*)
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