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llvm-project/llvm/test/CodeGen/X86/pku.ll

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[X86][PKU] Regenerate rdpkru/wrpkru intrinsic tests Added i686 checks llvm-svn: 329528
2018-04-08 20:30:30 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=knl --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,X64
Fix several accidental DOS line endings in source files Summary: There are a number of files in the tree which have been accidentally checked in with DOS line endings. Convert these to native line endings. There are also a few files which have DOS line endings on purpose, and I have set the svn:eol-style property to 'CRLF' on those. Reviewers: joerg, aaron.ballman Subscribers: aaron.ballman, sanjoy, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15848 llvm-svn: 256707
2016-01-04 01:22:03 +08:00
declare i32 @llvm.x86.rdpkru()
declare void @llvm.x86.wrpkru(i32)
define void @test_x86_wrpkru(i32 %src) {
[X86][PKU] Regenerate rdpkru/wrpkru intrinsic tests Added i686 checks llvm-svn: 329528
2018-04-08 20:30:30 +08:00
; X86-LABEL: test_x86_wrpkru:
; X86: ## %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; X86-NEXT: xorl %edx, %edx ## encoding: [0x31,0xd2]
[X86] Remove CustomInserters for RDPKRU/WRPKRU. Use some custom lowering and new ISD opcodes instead. These inserters inserted some instructions to zero some registers and copied from virtual registers to physical registers. This change instead inserts the zeros directly into the DAG at lowering time using new ISD opcodes that take the extra zeroes as inputs. The zeros will then go through isel on their own to select the MOV32r0 pseudo. Then we just need to mention the physical registers directly in the isel patterns and the isel table and InstrEmitter will take care of inserting the necessary copies to/from physical registers. llvm-svn: 357659
2019-04-04 08:28:49 +08:00
; X86-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9]
[X86][PKU] Regenerate rdpkru/wrpkru intrinsic tests Added i686 checks llvm-svn: 329528
2018-04-08 20:30:30 +08:00
; X86-NEXT: wrpkru ## encoding: [0x0f,0x01,0xef]
; X86-NEXT: retl ## encoding: [0xc3]
;
; X64-LABEL: test_x86_wrpkru:
; X64: ## %bb.0:
[X86] Handle COPYs of physregs better (regalloc hints) Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
2018-09-20 02:59:08 +08:00
; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
[X86][PKU] Regenerate rdpkru/wrpkru intrinsic tests Added i686 checks llvm-svn: 329528
2018-04-08 20:30:30 +08:00
; X64-NEXT: xorl %edx, %edx ## encoding: [0x31,0xd2]
[X86] Remove CustomInserters for RDPKRU/WRPKRU. Use some custom lowering and new ISD opcodes instead. These inserters inserted some instructions to zero some registers and copied from virtual registers to physical registers. This change instead inserts the zeros directly into the DAG at lowering time using new ISD opcodes that take the extra zeroes as inputs. The zeros will then go through isel on their own to select the MOV32r0 pseudo. Then we just need to mention the physical registers directly in the isel patterns and the isel table and InstrEmitter will take care of inserting the necessary copies to/from physical registers. llvm-svn: 357659
2019-04-04 08:28:49 +08:00
; X64-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9]
[X86][PKU] Regenerate rdpkru/wrpkru intrinsic tests Added i686 checks llvm-svn: 329528
2018-04-08 20:30:30 +08:00
; X64-NEXT: wrpkru ## encoding: [0x0f,0x01,0xef]
; X64-NEXT: retq ## encoding: [0xc3]
call void @llvm.x86.wrpkru(i32 %src)
Fix several accidental DOS line endings in source files Summary: There are a number of files in the tree which have been accidentally checked in with DOS line endings. Convert these to native line endings. There are also a few files which have DOS line endings on purpose, and I have set the svn:eol-style property to 'CRLF' on those. Reviewers: joerg, aaron.ballman Subscribers: aaron.ballman, sanjoy, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15848 llvm-svn: 256707
2016-01-04 01:22:03 +08:00
ret void
}
define i32 @test_x86_rdpkru() {
[X86] Regenerate PKU test to merge 32/64-bit rdpkru checks Test cleanup for D38128 llvm-svn: 338264
2018-07-31 00:15:18 +08:00
; CHECK-LABEL: test_x86_rdpkru:
; CHECK: ## %bb.0:
; CHECK-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9]
; CHECK-NEXT: rdpkru ## encoding: [0x0f,0x01,0xee]
; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
[X86][PKU] Regenerate rdpkru/wrpkru intrinsic tests Added i686 checks llvm-svn: 329528
2018-04-08 20:30:30 +08:00
%res = call i32 @llvm.x86.rdpkru()
ret i32 %res
Fix several accidental DOS line endings in source files Summary: There are a number of files in the tree which have been accidentally checked in with DOS line endings. Convert these to native line endings. There are also a few files which have DOS line endings on purpose, and I have set the svn:eol-style property to 'CRLF' on those. Reviewers: joerg, aaron.ballman Subscribers: aaron.ballman, sanjoy, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15848 llvm-svn: 256707
2016-01-04 01:22:03 +08:00
}