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llvm-project/llvm/test/CodeGen/X86/bswap_tree2.ll

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[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK64
; Check a few invalid patterns for halfword bswap pattern matching
; Don't match a near-miss 32-bit packed halfword bswap
; (with only half of the swap tree valid).
define i32 @test1(i32 %x) nounwind {
; CHECK-LABEL: test1:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: # %bb.0:
Add LiveRangeShrink pass to shrink live range within BB. Summary: LiveRangeShrink pass moves instruction right after the definition with the same BB if the instruction and its operands all have more than one use. This pass is inexpensive and guarantees optimal live-range within BB. Reviewers: davidxl, wmi, hfinkel, MatzeB, andreadb Reviewed By: MatzeB, andreadb Subscribers: hiraditya, jyknight, sanjoy, skatkov, gberry, jholewinski, qcolombet, javed.absar, krytarowski, atrick, spatel, RKSimon, andreadb, MatzeB, mehdi_amini, mgorny, efriedma, davide, dberlin, llvm-commits Differential Revision: https://reviews.llvm.org/D32563 llvm-svn: 304371
2017-06-01 07:25:25 +08:00
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: andl $16711680, %ecx # imm = 0xFF0000
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: orl $-16777216, %edx # imm = 0xFF000000
; CHECK-NEXT: shll $8, %ecx
; CHECK-NEXT: shrl $8, %edx
; CHECK-NEXT: orl %ecx, %edx
; CHECK-NEXT: bswapl %eax
; CHECK-NEXT: shrl $16, %eax
[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; CHECK-NEXT: orl %edx, %eax
; CHECK-NEXT: retl
;
; CHECK64-LABEL: test1:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK64: # %bb.0:
Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB." This also reverts follow-ups r303292 and r303298. It broke some Chromium tests under MSan, and apparently also internal tests at Google. llvm-svn: 303369
2017-05-19 02:50:05 +08:00
; CHECK64-NEXT: movl %edi, %eax
Add LiveRangeShrink pass to shrink live range within BB. Summary: LiveRangeShrink pass moves instruction right after the definition with the same BB if the instruction and its operands all have more than one use. This pass is inexpensive and guarantees optimal live-range within BB. Reviewers: davidxl, wmi, hfinkel, MatzeB, andreadb Reviewed By: MatzeB, andreadb Subscribers: hiraditya, jyknight, sanjoy, skatkov, gberry, jholewinski, qcolombet, javed.absar, krytarowski, atrick, spatel, RKSimon, andreadb, MatzeB, mehdi_amini, mgorny, efriedma, davide, dberlin, llvm-commits Differential Revision: https://reviews.llvm.org/D32563 llvm-svn: 304371
2017-06-01 07:25:25 +08:00
; CHECK64-NEXT: movl %edi, %ecx
[X86] Handle COPYs of physregs better (regalloc hints) Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
2018-09-20 02:59:08 +08:00
; CHECK64-NEXT: andl $16711680, %ecx # imm = 0xFF0000
; CHECK64-NEXT: movl %edi, %edx
; CHECK64-NEXT: orl $-16777216, %edx # imm = 0xFF000000
; CHECK64-NEXT: shll $8, %ecx
; CHECK64-NEXT: shrl $8, %edx
; CHECK64-NEXT: orl %ecx, %edx
; CHECK64-NEXT: bswapl %eax
; CHECK64-NEXT: shrl $16, %eax
; CHECK64-NEXT: orl %edx, %eax
[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; CHECK64-NEXT: retq
%byte0 = and i32 %x, 255 ; 0x000000ff
%byte1 = and i32 %x, 65280 ; 0x0000ff00
%byte2 = and i32 %x, 16711680 ; 0x00ff0000
%byte3 = or i32 %x, 4278190080 ; 0xff000000
%tmp0 = shl i32 %byte0, 8
%tmp1 = lshr i32 %byte1, 8
%tmp2 = shl i32 %byte2, 8
%tmp3 = lshr i32 %byte3, 8
%or0 = or i32 %tmp0, %tmp1
%or1 = or i32 %tmp2, %tmp3
%result = or i32 %or0, %or1
ret i32 %result
}
; Don't match a near-miss 32-bit packed halfword bswap
; (with swapped lshr/shl)
; ((x >> 8) & 0x0000ff00) |
; ((x << 8) & 0x000000ff) |
; ((x << 8) & 0xff000000) |
; ((x >> 8) & 0x00ff0000)
define i32 @test2(i32 %x) nounwind {
; CHECK-LABEL: test2:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: # %bb.0:
[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: shrl $8, %eax
; CHECK-NEXT: shll $8, %ecx
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: andl $65280, %edx # imm = 0xFF00
; CHECK-NEXT: andl $-16777216, %ecx # imm = 0xFF000000
; CHECK-NEXT: andl $16711680, %eax # imm = 0xFF0000
; CHECK-NEXT: orl %ecx, %eax
; CHECK-NEXT: orl %edx, %eax
; CHECK-NEXT: retl
;
; CHECK64-LABEL: test2:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK64: # %bb.0:
[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; CHECK64-NEXT: movl %edi, %eax
; CHECK64-NEXT: shrl $8, %eax
; CHECK64-NEXT: shll $8, %edi
; CHECK64-NEXT: movl %eax, %ecx
; CHECK64-NEXT: andl $65280, %ecx # imm = 0xFF00
; CHECK64-NEXT: andl $-16777216, %edi # imm = 0xFF000000
; CHECK64-NEXT: andl $16711680, %eax # imm = 0xFF0000
; CHECK64-NEXT: orl %edi, %eax
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. INC/DEC is really a special case of a more generic issue. We should also turn leas into add reg/reg or add reg/imm regardless of the slow lea flags. This also supports LEA64_32 which has 64 bit input registers and 32 bit output registers. So we need to convert the 64 bit inputs to their 32 bit equivalents to check if they are equal to base reg. One thing to note, the original code preserved the kill flags by adding operands to the new instruction instead of using addReg. But I think tied operands aren't supposed to have the kill flag set. I dropped the kill flags, but I could probably try to preserve it in the add reg/reg case if we think its important. Not sure which operand its supposed to go on for the LEA64_32r instruction due to the super reg implicit uses. Though I'm also not sure those are needed since they were probably just created by an INSERT_SUBREG from a 32-bit input. Differential Revision: https://reviews.llvm.org/D61472 llvm-svn: 361691
2019-05-25 14:17:47 +08:00
; CHECK64-NEXT: addl %ecx, %eax
[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; CHECK64-NEXT: retq
%byte1 = lshr i32 %x, 8
%byte0 = shl i32 %x, 8
%byte3 = shl i32 %x, 8
%byte2 = lshr i32 %x, 8
%tmp1 = and i32 %byte1, 65280 ; 0x0000ff00
%tmp0 = and i32 %byte0, 255 ; 0x000000ff
%tmp3 = and i32 %byte3, 4278190080 ; 0xff000000
%tmp2 = and i32 %byte2, 16711680 ; 0x00ff0000
%or0 = or i32 %tmp0, %tmp1
%or1 = or i32 %tmp2, %tmp3
%result = or i32 %or0, %or1
ret i32 %result
}
; Invalid pattern involving a unary op
define i32 @test3(float %x) nounwind {
; CHECK-LABEL: test3:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: # %bb.0:
[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; CHECK-NEXT: subl $8, %esp
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
[X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion When we need to do an fp->int conversion using x87 instructions, we need to temporarily change the rounding mode to 0b11 and perform a store. To do this we save the old value of the fpcw to the stack, then set the fpcw to 0xc7f, do the store, then restore fpcw. But the 0xc7f value forces the exception mask bits 1. While this is what they would be in the default FP environment, as we move to support changing the FP environments, we shouldn't make this assumption. This patch changes the code to explicitly OR 0xc00 with the old value so that only the rounding mode is changed. Unfortunately, this requires two stack temporaries instead of one. One to hold the old value and one to hold the new value. Without two stack temporaries we would need an additional GPR. We already need one to do the OR operation in. This is similar to what gcc and icc do for this operation. Though they are both better at reusing the stack temporaries when there are multiple truncates in a function(or at least in a basic block) Differential Revision: https://reviews.llvm.org/D57788 llvm-svn: 354178
2019-02-16 05:59:33 +08:00
; CHECK-NEXT: fnstcw (%esp)
; CHECK-NEXT: movzwl (%esp), %eax
; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
[X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion When we need to do an fp->int conversion using x87 instructions, we need to temporarily change the rounding mode to 0b11 and perform a store. To do this we save the old value of the fpcw to the stack, then set the fpcw to 0xc7f, do the store, then restore fpcw. But the 0xc7f value forces the exception mask bits 1. While this is what they would be in the default FP environment, as we move to support changing the FP environments, we shouldn't make this assumption. This patch changes the code to explicitly OR 0xc00 with the old value so that only the rounding mode is changed. Unfortunately, this requires two stack temporaries instead of one. One to hold the old value and one to hold the new value. Without two stack temporaries we would need an additional GPR. We already need one to do the OR operation in. This is similar to what gcc and icc do for this operation. Though they are both better at reusing the stack temporaries when there are multiple truncates in a function(or at least in a basic block) Differential Revision: https://reviews.llvm.org/D57788 llvm-svn: 354178
2019-02-16 05:59:33 +08:00
; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw (%esp)
[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl %ecx, %edx
; CHECK-NEXT: shll $8, %edx
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: shrl $8, %eax
; CHECK-NEXT: andl $65280, %ecx # imm = 0xFF00
; CHECK-NEXT: andl $-16777216, %edx # imm = 0xFF000000
; CHECK-NEXT: andl $16711680, %eax # imm = 0xFF0000
; CHECK-NEXT: orl %edx, %eax
; CHECK-NEXT: orl %ecx, %eax
; CHECK-NEXT: addl $8, %esp
; CHECK-NEXT: retl
;
; CHECK64-LABEL: test3:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK64: # %bb.0:
[X86] Add D32039/PR31357 tests to show current BSWAP codegen llvm-svn: 300672
2017-04-19 19:06:22 +08:00
; CHECK64-NEXT: cvttss2si %xmm0, %ecx
; CHECK64-NEXT: movl %ecx, %edx
; CHECK64-NEXT: shll $8, %edx
; CHECK64-NEXT: movl %ecx, %eax
; CHECK64-NEXT: shrl $8, %eax
; CHECK64-NEXT: andl $65280, %ecx # imm = 0xFF00
; CHECK64-NEXT: andl $-16777216, %edx # imm = 0xFF000000
; CHECK64-NEXT: andl $16711680, %eax # imm = 0xFF0000
; CHECK64-NEXT: orl %edx, %eax
; CHECK64-NEXT: orl %ecx, %eax
; CHECK64-NEXT: retq
%integer = fptosi float %x to i32
%byte0 = shl i32 %integer, 8
%byte3 = shl i32 %integer, 8
%byte2 = lshr i32 %integer, 8
%tmp1 = and i32 %integer, 65280 ; 0x0000ff00
%tmp0 = and i32 %byte0, 255 ; 0x000000ff
%tmp3 = and i32 %byte3, 4278190080 ; 0xff000000
%tmp2 = and i32 %byte2, 16711680 ; 0x00ff0000
%or0 = or i32 %tmp0, %tmp1
%or1 = or i32 %tmp2, %tmp3
%result = or i32 %or0, %or1
ret i32 %result
}