2017-07-13 18:41:49 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=i686 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
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; Combine BSWAP (lowered to rolw 8) with a second rotate.
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; This test checks for combining rotates with inconsistent constant value types.
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define i16 @combine_bswap_rotate(i16 %a0) {
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; X86-LABEL: combine_bswap_rotate:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0:
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2017-07-13 18:41:49 +08:00
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: rolw $9, %ax
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; X86-NEXT: retl
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;
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; X64-LABEL: combine_bswap_rotate:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2017-07-13 18:41:49 +08:00
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; X64-NEXT: movl %edi, %eax
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2018-09-20 02:59:08 +08:00
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; X64-NEXT: rolw $9, %ax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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2017-07-13 18:41:49 +08:00
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; X64-NEXT: retq
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%1 = call i16 @llvm.bswap.i16(i16 %a0)
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%2 = shl i16 %1, 1
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%3 = lshr i16 %1, 15
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%4 = or i16 %2, %3
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ret i16 %4
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}
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declare i16 @llvm.bswap.i16(i16)
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