AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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2019-02-08 03:10:15 +08:00
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# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
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# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
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AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
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2019-02-08 03:10:15 +08:00
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---
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name: test_implicit_def_s1
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s1
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: $vgpr0 = COPY [[DEF]](s32)
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%0:_(s1) = G_IMPLICIT_DEF
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%1:_(s32) = G_ANYEXT %0
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$vgpr0 = COPY %1
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...
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---
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name: test_implicit_def_s7
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s7
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)
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; CHECK: $vgpr0 = COPY [[COPY]](s32)
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%0:_(s7) = G_IMPLICIT_DEF
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%1:_(s32) = G_ANYEXT %0
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$vgpr0 = COPY %1
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...
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---
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name: test_implicit_def_s8
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s8
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)
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; CHECK: $vgpr0 = COPY [[COPY]](s32)
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%0:_(s8) = G_IMPLICIT_DEF
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%1:_(s32) = G_ANYEXT %0
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$vgpr0 = COPY %1
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...
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---
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name: test_implicit_def_s16
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s16
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)
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; CHECK: $vgpr0 = COPY [[COPY]](s32)
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%0:_(s16) = G_IMPLICIT_DEF
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%1:_(s32) = G_ANYEXT %0
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$vgpr0 = COPY %1
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...
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---
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name: test_implicit_def_s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s32
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: $vgpr0 = COPY [[DEF]](s32)
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%0:_(s32) = G_IMPLICIT_DEF
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$vgpr0 = COPY %0
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...
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2019-02-08 22:46:27 +08:00
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---
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name: test_implicit_def_48
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_48
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY [[DEF]](s64)
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; CHECK: $vgpr0_vgpr1 = COPY [[COPY]](s64)
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%0:_(s48) = G_IMPLICIT_DEF
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%1:_(s64) = G_ANYEXT %0
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$vgpr0_vgpr1 = COPY %1
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...
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2019-02-08 03:10:15 +08:00
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---
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name: test_implicit_def_s64
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s64
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](s64)
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%0:_(s64) = G_IMPLICIT_DEF
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$vgpr0_vgpr1 = COPY %0
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...
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2019-02-08 22:46:27 +08:00
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---
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name: test_implicit_def_s65
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s65
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; CHECK: [[DEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF
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; CHECK: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[DEF]](s128)
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; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[TRUNC]](s96)
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%0:_(s65) = G_IMPLICIT_DEF
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%1:_(s96) = G_ANYEXT %0
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$vgpr0_vgpr1_vgpr2 = COPY %1
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...
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2019-02-08 03:10:15 +08:00
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---
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name: test_implicit_def_s128
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s128
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; CHECK: [[DEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[DEF]](s128)
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%0:_(s128) = G_IMPLICIT_DEF
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %0
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...
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AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
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---
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2019-02-08 03:10:15 +08:00
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name: test_implicit_def_256
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AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
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body: |
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bb.0:
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2019-02-08 03:10:15 +08:00
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; CHECK-LABEL: name: test_implicit_def_256
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; CHECK: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[DEF]](s256)
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%0:_(s256) = G_IMPLICIT_DEF
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$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %0
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...
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---
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name: test_implicit_def_s448
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s448
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AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
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; CHECK: [[DEF:%[0-9]+]]:_(s448) = G_IMPLICIT_DEF
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; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[DEF]](s448), 0
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; CHECK: $vgpr0 = COPY [[EXTRACT]](s32)
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%0:_(s448) = G_IMPLICIT_DEF
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%1:_(s32) = G_EXTRACT %0, 0
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$vgpr0 = COPY %1
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...
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2019-02-08 03:10:15 +08:00
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---
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name: test_implicit_def_s512
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s512
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; CHECK: [[DEF:%[0-9]+]]:_(s512) = G_IMPLICIT_DEF
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; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[DEF]](s512), 0
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; CHECK: $vgpr0 = COPY [[EXTRACT]](s32)
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%0:_(s512) = G_IMPLICIT_DEF
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%1:_(s32) = G_EXTRACT %0, 0
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$vgpr0 = COPY %1
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...
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---
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name: test_implicit_def_s1024
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s1024
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; CHECK: [[DEF:%[0-9]+]]:_(s512) = G_IMPLICIT_DEF
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; CHECK: [[DEF1:%[0-9]+]]:_(s512) = G_IMPLICIT_DEF
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; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[DEF]](s512), 0
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; CHECK: $vgpr0 = COPY [[EXTRACT]](s32)
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%0:_(s1024) = G_IMPLICIT_DEF
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%1:_(s32) = G_EXTRACT %0, 0
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$vgpr0 = COPY %1
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...
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---
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name: test_implicit_def_v2s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_v2s32
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; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
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; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](<2 x s32>)
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%0:_(<2 x s32>) = G_IMPLICIT_DEF
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$vgpr0_vgpr1 = COPY %0
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...
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---
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name: test_implicit_def_v3s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_v3s32
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; CHECK: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
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; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[DEF]](<3 x s32>)
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%0:_(<3 x s32>) = G_IMPLICIT_DEF
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$vgpr0_vgpr1_vgpr2 = COPY %0
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...
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---
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name: test_implicit_def_v4s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_v4s32
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; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[DEF]](<4 x s32>)
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%0:_(<4 x s32>) = G_IMPLICIT_DEF
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %0
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...
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2019-02-26 04:46:06 +08:00
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---
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name: test_implicit_def_v5s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_v5s32
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; CHECK: [[DEF:%[0-9]+]]:_(<5 x s32>) = G_IMPLICIT_DEF
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; CHECK: S_NOP 0, implicit [[DEF]](<5 x s32>)
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%0:_(<5 x s32>) = G_IMPLICIT_DEF
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S_NOP 0, implicit %0
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...
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---
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name: test_implicit_def_v6s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_v6s32
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; CHECK: [[DEF:%[0-9]+]]:_(<6 x s32>) = G_IMPLICIT_DEF
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; CHECK: S_NOP 0, implicit [[DEF]](<6 x s32>)
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%0:_(<6 x s32>) = G_IMPLICIT_DEF
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S_NOP 0, implicit %0
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...
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---
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name: test_implicit_def_v7s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_v7s32
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; CHECK: [[DEF:%[0-9]+]]:_(<7 x s32>) = G_IMPLICIT_DEF
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; CHECK: S_NOP 0, implicit [[DEF]](<7 x s32>)
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%0:_(<7 x s32>) = G_IMPLICIT_DEF
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S_NOP 0, implicit %0
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...
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---
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name: test_implicit_def_v8s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_v8s32
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; CHECK: [[DEF:%[0-9]+]]:_(<8 x s32>) = G_IMPLICIT_DEF
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[DEF]](<8 x s32>)
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%0:_(<8 x s32>) = G_IMPLICIT_DEF
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$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %0
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...
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---
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name: test_implicit_def_v16s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_v16s32
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; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[DEF]](<16 x s32>)
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%0:_(<16 x s32>) = G_IMPLICIT_DEF
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|
|
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_v17s32
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v17s32
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<17 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: S_NOP 0, implicit [[DEF]](<17 x s32>)
|
|
|
|
%0:_(<17 x s32>) = G_IMPLICIT_DEF
|
|
|
|
S_NOP 0, implicit %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_v32s32
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v32s32
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[DEF1:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<32 x s32>) = G_CONCAT_VECTORS [[DEF]](<16 x s32>), [[DEF1]](<16 x s32>)
|
|
|
|
; CHECK: S_NOP 0, implicit [[CONCAT_VECTORS]](<32 x s32>)
|
|
|
|
%0:_(<32 x s32>) = G_IMPLICIT_DEF
|
|
|
|
S_NOP 0, implicit %0
|
|
|
|
...
|
|
|
|
|
2019-02-08 03:10:15 +08:00
|
|
|
---
|
|
|
|
name: test_implicit_def_v2s1
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v2s1
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY [[DEF]](<2 x s32>)
|
|
|
|
; CHECK: $vgpr0_vgpr1 = COPY [[COPY]](<2 x s32>)
|
|
|
|
%0:_(<2 x s1>) = G_IMPLICIT_DEF
|
|
|
|
%1:_(<2 x s32>) = G_ANYEXT %0
|
|
|
|
$vgpr0_vgpr1 = COPY %1
|
|
|
|
...
|
|
|
|
|
2019-02-12 06:00:39 +08:00
|
|
|
---
|
|
|
|
name: test_implicit_def_v3s1
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v3s1
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(<4 x s1>) = G_TRUNC [[DEF]](<4 x s32>)
|
|
|
|
; CHECK: [[EXTRACT:%[0-9]+]]:_(<3 x s1>) = G_EXTRACT [[TRUNC]](<4 x s1>), 0
|
|
|
|
; CHECK: [[UV:%[0-9]+]]:_(s1), [[UV1:%[0-9]+]]:_(s1), [[UV2:%[0-9]+]]:_(s1) = G_UNMERGE_VALUES [[EXTRACT]](<3 x s1>)
|
|
|
|
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s1)
|
|
|
|
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s1)
|
|
|
|
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s1)
|
|
|
|
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32)
|
|
|
|
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
|
|
|
|
%0:_(<3 x s1>) = G_IMPLICIT_DEF
|
|
|
|
%1:_(<3 x s32>) = G_ANYEXT %0
|
|
|
|
$vgpr0_vgpr1_vgpr2 = COPY %1
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_v2s8
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v2s8
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY [[DEF]](<2 x s32>)
|
|
|
|
; CHECK: $vgpr0_vgpr1 = COPY [[COPY]](<2 x s32>)
|
|
|
|
%0:_(<2 x s8>) = G_IMPLICIT_DEF
|
|
|
|
%1:_(<2 x s32>) = G_ANYEXT %0
|
|
|
|
$vgpr0_vgpr1 = COPY %1
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_v3s8
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v3s8
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[DEF]](<4 x s32>)
|
|
|
|
; CHECK: [[EXTRACT:%[0-9]+]]:_(<3 x s8>) = G_EXTRACT [[TRUNC]](<4 x s8>), 0
|
|
|
|
; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[EXTRACT]](<3 x s8>)
|
|
|
|
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s8)
|
|
|
|
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s8)
|
|
|
|
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s8)
|
|
|
|
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32)
|
|
|
|
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
|
|
|
|
%0:_(<3 x s8>) = G_IMPLICIT_DEF
|
|
|
|
%1:_(<3 x s32>) = G_ANYEXT %0
|
|
|
|
$vgpr0_vgpr1_vgpr2 = COPY %1
|
|
|
|
...
|
|
|
|
|
2019-02-08 03:10:15 +08:00
|
|
|
---
|
|
|
|
name: test_implicit_def_v2s16
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v2s16
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: $vgpr0 = COPY [[DEF]](<2 x s16>)
|
|
|
|
%0:_(<2 x s16>) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_v3s16
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v3s16
|
2019-02-12 06:00:39 +08:00
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0
|
2019-02-08 03:10:15 +08:00
|
|
|
; CHECK: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
|
2019-02-12 06:00:39 +08:00
|
|
|
; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0
|
2019-02-08 03:10:15 +08:00
|
|
|
; CHECK: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>)
|
|
|
|
%0:_(<3 x s16>) = G_IMPLICIT_DEF
|
|
|
|
%1:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
|
|
%2:_(<4 x s16>) = G_INSERT %1, %0, 0
|
|
|
|
$vgpr0_vgpr1 = COPY %2
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_v4s16
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v4s16
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](<4 x s16>)
|
|
|
|
%0:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0_vgpr1 = COPY %0
|
|
|
|
...
|
|
|
|
|
2019-02-12 06:00:39 +08:00
|
|
|
---
|
|
|
|
name: test_implicit_def_v5s16
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v5s16
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<6 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(<6 x s16>) = G_TRUNC [[DEF]](<6 x s32>)
|
|
|
|
; CHECK: [[EXTRACT:%[0-9]+]]:_(<5 x s16>) = G_EXTRACT [[TRUNC]](<6 x s16>), 0
|
|
|
|
; CHECK: [[DEF1:%[0-9]+]]:_(<8 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[TRUNC1:%[0-9]+]]:_(<8 x s16>) = G_TRUNC [[DEF1]](<8 x s32>)
|
|
|
|
; CHECK: [[INSERT:%[0-9]+]]:_(<8 x s16>) = G_INSERT [[TRUNC1]], [[EXTRACT]](<5 x s16>), 0
|
|
|
|
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](<8 x s16>)
|
|
|
|
%0:_(<5 x s16>) = G_IMPLICIT_DEF
|
|
|
|
%1:_(<8 x s16>) = G_IMPLICIT_DEF
|
|
|
|
%2:_(<8 x s16>) = G_INSERT %1, %0, 0
|
|
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_v6s16
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v6s16
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<6 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(<6 x s16>) = G_TRUNC [[DEF]](<6 x s32>)
|
|
|
|
; CHECK: [[DEF1:%[0-9]+]]:_(<8 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[TRUNC1:%[0-9]+]]:_(<8 x s16>) = G_TRUNC [[DEF1]](<8 x s32>)
|
|
|
|
; CHECK: [[INSERT:%[0-9]+]]:_(<8 x s16>) = G_INSERT [[TRUNC1]], [[TRUNC]](<6 x s16>), 0
|
|
|
|
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](<8 x s16>)
|
|
|
|
%0:_(<6 x s16>) = G_IMPLICIT_DEF
|
|
|
|
%1:_(<8 x s16>) = G_IMPLICIT_DEF
|
|
|
|
%2:_(<8 x s16>) = G_INSERT %1, %0, 0
|
|
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
|
|
...
|
|
|
|
|
2019-02-08 03:10:15 +08:00
|
|
|
---
|
|
|
|
name: test_implicit_def_v8s16
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v8s16
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<8 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(<8 x s16>) = G_TRUNC [[DEF]](<8 x s32>)
|
|
|
|
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[TRUNC]](<8 x s16>)
|
|
|
|
%0:_(<8 x s16>) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_v2s64
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v2s64
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[DEF]](<2 x s64>)
|
|
|
|
%0:_(<2 x s64>) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_v4s8
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_v4s8
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[DEF]](<4 x s32>)
|
|
|
|
; CHECK: $vgpr0 = COPY [[TRUNC]](<4 x s8>)
|
|
|
|
%0:_(<4 x s8>) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_p0
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_p0
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](p0)
|
|
|
|
%0:_(p0) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0_vgpr1 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_p1
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_p1
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](p1)
|
|
|
|
%0:_(p1) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0_vgpr1 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_p2
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_p2
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(p2) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: $vgpr0 = COPY [[DEF]](p2)
|
|
|
|
%0:_(p2) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_p3
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_p3
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(p3) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: $vgpr0 = COPY [[DEF]](p3)
|
|
|
|
%0:_(p3) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_p4
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_p4
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](p4)
|
|
|
|
%0:_(p4) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0_vgpr1 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_p5
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_p5
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(p5) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: $vgpr0 = COPY [[DEF]](p5)
|
|
|
|
%0:_(p5) = G_IMPLICIT_DEF
|
|
|
|
$vgpr0 = COPY %0
|
|
|
|
...
|
|
|
|
|
|
|
|
---
|
|
|
|
name: test_implicit_def_p999
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: test_implicit_def_p999
|
|
|
|
; CHECK: [[DEF:%[0-9]+]]:_(p999) = G_IMPLICIT_DEF
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; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](p999)
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%0:_(p999) = G_IMPLICIT_DEF
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$vgpr0_vgpr1 = COPY %0
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|
...
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