2012-05-10 21:48:04 +08:00
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//===-- tsan_interface_atomic.h ---------------------------------*- C++ -*-===//
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2012-05-10 21:48:04 +08:00
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of ThreadSanitizer (TSan), a race detector.
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//
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2013-12-11 16:18:50 +08:00
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// Public interface header for TSan atomics.
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2012-05-10 21:48:04 +08:00
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//===----------------------------------------------------------------------===//
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#ifndef TSAN_INTERFACE_ATOMIC_H
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#define TSAN_INTERFACE_ATOMIC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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2019-09-12 07:19:48 +08:00
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typedef char __tsan_atomic8;
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typedef short __tsan_atomic16;
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typedef int __tsan_atomic32;
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typedef long __tsan_atomic64;
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2012-11-27 20:51:16 +08:00
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#if defined(__SIZEOF_INT128__) \
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|| (__clang_major__ * 100 + __clang_minor__ >= 302)
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2012-12-13 23:26:04 +08:00
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__extension__ typedef __int128 __tsan_atomic128;
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# define __TSAN_HAS_INT128 1
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2012-11-27 17:35:44 +08:00
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#else
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# define __TSAN_HAS_INT128 0
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2012-11-27 17:35:44 +08:00
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#endif
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2012-05-10 21:48:04 +08:00
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2012-10-03 21:00:13 +08:00
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// Part of ABI, do not change.
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2021-02-01 15:24:21 +08:00
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// https://github.com/llvm/llvm-project/blob/main/libcxx/include/atomic
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2012-05-10 21:48:04 +08:00
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typedef enum {
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2012-11-09 22:11:51 +08:00
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__tsan_memory_order_relaxed,
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__tsan_memory_order_consume,
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__tsan_memory_order_acquire,
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__tsan_memory_order_release,
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__tsan_memory_order_acq_rel,
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__tsan_memory_order_seq_cst
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2012-05-10 21:48:04 +08:00
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} __tsan_memory_order;
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__tsan_atomic8 __tsan_atomic8_load(const volatile __tsan_atomic8 *a,
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__tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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__tsan_atomic16 __tsan_atomic16_load(const volatile __tsan_atomic16 *a,
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__tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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__tsan_atomic32 __tsan_atomic32_load(const volatile __tsan_atomic32 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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__tsan_atomic64 __tsan_atomic64_load(const volatile __tsan_atomic64 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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__tsan_atomic128 __tsan_atomic128_load(const volatile __tsan_atomic128 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo);
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#endif
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2012-05-10 21:48:04 +08:00
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void __tsan_atomic8_store(volatile __tsan_atomic8 *a, __tsan_atomic8 v,
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__tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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void __tsan_atomic16_store(volatile __tsan_atomic16 *a, __tsan_atomic16 v,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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void __tsan_atomic32_store(volatile __tsan_atomic32 *a, __tsan_atomic32 v,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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void __tsan_atomic64_store(volatile __tsan_atomic64 *a, __tsan_atomic64 v,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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void __tsan_atomic128_store(volatile __tsan_atomic128 *a, __tsan_atomic128 v,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo);
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#endif
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2012-05-10 21:48:04 +08:00
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2012-05-14 23:33:00 +08:00
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__tsan_atomic8 __tsan_atomic8_exchange(volatile __tsan_atomic8 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic8 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic16 __tsan_atomic16_exchange(volatile __tsan_atomic16 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic16 v, __tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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__tsan_atomic32 __tsan_atomic32_exchange(volatile __tsan_atomic32 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic32 v, __tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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__tsan_atomic64 __tsan_atomic64_exchange(volatile __tsan_atomic64 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic64 v, __tsan_memory_order mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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__tsan_atomic128 __tsan_atomic128_exchange(volatile __tsan_atomic128 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic128 v, __tsan_memory_order mo);
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#endif
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2012-05-10 21:48:04 +08:00
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2012-05-14 23:33:00 +08:00
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__tsan_atomic8 __tsan_atomic8_fetch_add(volatile __tsan_atomic8 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic8 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic16 __tsan_atomic16_fetch_add(volatile __tsan_atomic16 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic16 v, __tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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__tsan_atomic32 __tsan_atomic32_fetch_add(volatile __tsan_atomic32 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic32 v, __tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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__tsan_atomic64 __tsan_atomic64_fetch_add(volatile __tsan_atomic64 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic64 v, __tsan_memory_order mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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__tsan_atomic128 __tsan_atomic128_fetch_add(volatile __tsan_atomic128 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic128 v, __tsan_memory_order mo);
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#endif
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2012-05-10 21:48:04 +08:00
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2012-10-04 18:08:23 +08:00
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__tsan_atomic8 __tsan_atomic8_fetch_sub(volatile __tsan_atomic8 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic8 v, __tsan_memory_order mo);
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2012-10-04 18:08:23 +08:00
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__tsan_atomic16 __tsan_atomic16_fetch_sub(volatile __tsan_atomic16 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic16 v, __tsan_memory_order mo);
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2012-10-04 18:08:23 +08:00
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__tsan_atomic32 __tsan_atomic32_fetch_sub(volatile __tsan_atomic32 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic32 v, __tsan_memory_order mo);
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2012-10-04 18:08:23 +08:00
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__tsan_atomic64 __tsan_atomic64_fetch_sub(volatile __tsan_atomic64 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic64 v, __tsan_memory_order mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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__tsan_atomic128 __tsan_atomic128_fetch_sub(volatile __tsan_atomic128 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic128 v, __tsan_memory_order mo);
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#endif
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2012-10-04 18:08:23 +08:00
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2012-05-14 23:33:00 +08:00
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__tsan_atomic8 __tsan_atomic8_fetch_and(volatile __tsan_atomic8 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic8 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic16 __tsan_atomic16_fetch_and(volatile __tsan_atomic16 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic16 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic32 __tsan_atomic32_fetch_and(volatile __tsan_atomic32 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic32 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic64 __tsan_atomic64_fetch_and(volatile __tsan_atomic64 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic64 v, __tsan_memory_order mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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__tsan_atomic128 __tsan_atomic128_fetch_and(volatile __tsan_atomic128 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic128 v, __tsan_memory_order mo);
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#endif
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2012-05-14 23:33:00 +08:00
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__tsan_atomic8 __tsan_atomic8_fetch_or(volatile __tsan_atomic8 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic8 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic16 __tsan_atomic16_fetch_or(volatile __tsan_atomic16 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic16 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic32 __tsan_atomic32_fetch_or(volatile __tsan_atomic32 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic32 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic64 __tsan_atomic64_fetch_or(volatile __tsan_atomic64 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic64 v, __tsan_memory_order mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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__tsan_atomic128 __tsan_atomic128_fetch_or(volatile __tsan_atomic128 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic128 v, __tsan_memory_order mo);
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#endif
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2012-05-14 23:33:00 +08:00
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__tsan_atomic8 __tsan_atomic8_fetch_xor(volatile __tsan_atomic8 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic8 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic16 __tsan_atomic16_fetch_xor(volatile __tsan_atomic16 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic16 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic32 __tsan_atomic32_fetch_xor(volatile __tsan_atomic32 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic32 v, __tsan_memory_order mo);
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2012-05-14 23:33:00 +08:00
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__tsan_atomic64 __tsan_atomic64_fetch_xor(volatile __tsan_atomic64 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic64 v, __tsan_memory_order mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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__tsan_atomic128 __tsan_atomic128_fetch_xor(volatile __tsan_atomic128 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic128 v, __tsan_memory_order mo);
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#endif
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2012-05-14 23:33:00 +08:00
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2012-11-26 17:42:56 +08:00
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__tsan_atomic8 __tsan_atomic8_fetch_nand(volatile __tsan_atomic8 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic8 v, __tsan_memory_order mo);
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2012-11-26 17:42:56 +08:00
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__tsan_atomic16 __tsan_atomic16_fetch_nand(volatile __tsan_atomic16 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic16 v, __tsan_memory_order mo);
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2012-11-26 17:42:56 +08:00
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__tsan_atomic32 __tsan_atomic32_fetch_nand(volatile __tsan_atomic32 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic32 v, __tsan_memory_order mo);
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2012-11-26 17:42:56 +08:00
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__tsan_atomic64 __tsan_atomic64_fetch_nand(volatile __tsan_atomic64 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic64 v, __tsan_memory_order mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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__tsan_atomic128 __tsan_atomic128_fetch_nand(volatile __tsan_atomic128 *a,
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2013-12-11 16:18:50 +08:00
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__tsan_atomic128 v, __tsan_memory_order mo);
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#endif
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2012-11-26 17:42:56 +08:00
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2012-05-14 23:33:00 +08:00
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int __tsan_atomic8_compare_exchange_weak(volatile __tsan_atomic8 *a,
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2012-11-23 23:51:45 +08:00
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__tsan_atomic8 *c, __tsan_atomic8 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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2012-05-14 23:33:00 +08:00
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int __tsan_atomic16_compare_exchange_weak(volatile __tsan_atomic16 *a,
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2012-11-23 23:51:45 +08:00
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__tsan_atomic16 *c, __tsan_atomic16 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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2012-05-14 23:33:00 +08:00
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int __tsan_atomic32_compare_exchange_weak(volatile __tsan_atomic32 *a,
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2012-11-23 23:51:45 +08:00
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__tsan_atomic32 *c, __tsan_atomic32 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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2012-05-14 23:33:00 +08:00
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int __tsan_atomic64_compare_exchange_weak(volatile __tsan_atomic64 *a,
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2012-11-23 23:51:45 +08:00
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__tsan_atomic64 *c, __tsan_atomic64 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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int __tsan_atomic128_compare_exchange_weak(volatile __tsan_atomic128 *a,
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__tsan_atomic128 *c, __tsan_atomic128 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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#endif
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2012-05-14 23:33:00 +08:00
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int __tsan_atomic8_compare_exchange_strong(volatile __tsan_atomic8 *a,
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2012-11-23 23:51:45 +08:00
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__tsan_atomic8 *c, __tsan_atomic8 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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2012-05-14 23:33:00 +08:00
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int __tsan_atomic16_compare_exchange_strong(volatile __tsan_atomic16 *a,
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2012-11-23 23:51:45 +08:00
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__tsan_atomic16 *c, __tsan_atomic16 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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2012-05-10 21:48:04 +08:00
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int __tsan_atomic32_compare_exchange_strong(volatile __tsan_atomic32 *a,
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2012-11-23 23:51:45 +08:00
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__tsan_atomic32 *c, __tsan_atomic32 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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2012-05-10 21:48:04 +08:00
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int __tsan_atomic64_compare_exchange_strong(volatile __tsan_atomic64 *a,
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2012-11-23 23:51:45 +08:00
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__tsan_atomic64 *c, __tsan_atomic64 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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int __tsan_atomic128_compare_exchange_strong(volatile __tsan_atomic128 *a,
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__tsan_atomic128 *c, __tsan_atomic128 v, __tsan_memory_order mo,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order fail_mo);
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#endif
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2012-05-10 21:48:04 +08:00
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2012-11-09 20:54:37 +08:00
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__tsan_atomic8 __tsan_atomic8_compare_exchange_val(
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volatile __tsan_atomic8 *a, __tsan_atomic8 c, __tsan_atomic8 v,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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2012-11-09 20:54:37 +08:00
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__tsan_atomic16 __tsan_atomic16_compare_exchange_val(
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volatile __tsan_atomic16 *a, __tsan_atomic16 c, __tsan_atomic16 v,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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2012-11-09 20:54:37 +08:00
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__tsan_atomic32 __tsan_atomic32_compare_exchange_val(
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volatile __tsan_atomic32 *a, __tsan_atomic32 c, __tsan_atomic32 v,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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2012-11-09 20:54:37 +08:00
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__tsan_atomic64 __tsan_atomic64_compare_exchange_val(
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volatile __tsan_atomic64 *a, __tsan_atomic64 c, __tsan_atomic64 v,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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#if __TSAN_HAS_INT128
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2012-11-27 15:41:27 +08:00
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__tsan_atomic128 __tsan_atomic128_compare_exchange_val(
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volatile __tsan_atomic128 *a, __tsan_atomic128 c, __tsan_atomic128 v,
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2013-12-11 16:18:50 +08:00
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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#endif
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2012-11-09 20:54:37 +08:00
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2013-12-11 16:18:50 +08:00
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void __tsan_atomic_thread_fence(__tsan_memory_order mo);
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void __tsan_atomic_signal_fence(__tsan_memory_order mo);
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2012-05-10 21:48:04 +08:00
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#ifdef __cplusplus
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} // extern "C"
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#endif
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2013-12-11 16:18:50 +08:00
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#endif // TSAN_INTERFACE_ATOMIC_H
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