forked from OSchip/llvm-project
55 lines
1.7 KiB
LLVM
55 lines
1.7 KiB
LLVM
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; RUN: llc -march=hexagon -enable-pipeliner -pipeliner-max-stages=2 \
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; RUN: -pipeliner-ignore-recmii -disable-hexagon-nv-schedule -stats -o /dev/null\
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; RUN: -enable-aa-sched-mi < %s 2>&1 | FileCheck %s --check-prefix=STATS
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; REQUIRES: asserts
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;
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; Test that we generate the correct phis in the last epilog block when
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; allowing multiple stages.
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;
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; STATS: 1 pipeliner - Number of loops software pipelined
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; Function Attrs: nounwind
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define void @f0() #0 {
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b0:
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br i1 undef, label %b6, label %b1
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b1: ; preds = %b0
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br i1 undef, label %b6, label %b2
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b2: ; preds = %b1
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br label %b4
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b3: ; preds = %b4, %b3
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%v0 = add nsw i32 0, 57344
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%v1 = trunc i32 %v0 to i16
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store i16 %v1, i16* null, align 2, !tbaa !0
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%v2 = getelementptr inbounds i8, i8* null, i32 undef
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%v3 = load i8, i8* %v2, align 1, !tbaa !4
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%v4 = zext i8 %v3 to i32
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%v5 = shl nuw nsw i32 %v4, 6
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%v6 = add nsw i32 %v5, 57344
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%v7 = trunc i32 %v6 to i16
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store i16 %v7, i16* undef, align 2, !tbaa !0
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br i1 undef, label %b5, label %b3
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b4: ; preds = %b5, %b2
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%v8 = phi i32 [ 0, %b2 ], [ %v9, %b5 ]
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br label %b3
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b5: ; preds = %b3
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%v9 = add i32 %v8, 1
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%v10 = icmp eq i32 %v9, undef
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br i1 %v10, label %b6, label %b4
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b6: ; preds = %b5, %b1, %b0
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"short", !2}
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!2 = !{!"omnipotent char", !3}
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!3 = !{!"Simple C/C++ TBAA"}
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!4 = !{!2, !2, i64 0}
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