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llvm-project/llvm/test/CodeGen/X86/xray-multiplerets-in-blocks...

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[XRay] Fix machine verifier issues in X86 I'm not sure if this fix is the right thing to do, but it seemed to me that PATCHABLE_RET and PATCHABLE_TAIL_CALL don't have any defs. Running the following: ``` LLVM_ENABLE_MACHINE_VERIFIER=1 ./build/bin/llvm-lit -v -a test/CodeGen/X86/xray-* ``` results in the following tests to fail (along others): ``` LLVM :: CodeGen/X86/xray-attribute-instrumentation.ll LLVM :: CodeGen/X86/xray-custom-log.ll LLVM :: CodeGen/X86/xray-log-args.ll LLVM :: CodeGen/X86/xray-loop-detection.ll LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir LLVM :: CodeGen/X86/xray-section-group.ll LLVM :: CodeGen/X86/xray-selective-instrumentation.ll LLVM :: CodeGen/X86/xray-tail-call-sled.ll LLVM :: CodeGen/X86/xray-typed-event-log.ll ``` The errors are: ``` *** Bad machine code: Explicit definition must be a register *** - function: fn - basic block: %bb.0 (0x7fa31a84d908) - instruction: PATCHABLE_RET 2560, $eax - operand 0: 2560 ``` and ``` *** Bad machine code: Explicit definition must be a register *** - function: caller - basic block: %bb.0 (0x7fbff3044108) - instruction: PATCHABLE_TAIL_CALL 3009, @callee, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit $edi - operand 0: 3009 ``` Differential Revision: https://reviews.llvm.org/D49187 llvm-svn: 336906
2018-07-12 22:36:43 +08:00
# RUN: llc -verify-machineinstrs -run-pass xray-instrumentation -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s
[XRay] Support multiple return instructions in a single basic block Add a .mir test to catch this case, and fix the xray-instrumentation pass to handle it appropriately. llvm-svn: 280192
2016-08-31 13:20:08 +08:00
#
# Make sure we can handle multiple ret instructions in a single basic block for
# XRay.
--- |
define i32 @foo() noinline uwtable "function-instrument"="xray-always" {
ret i32 0
ret i32 1
}
...
---
name: foo
tracksRegLiveness: true
liveins:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
- { reg: '$edi'}
[XRay] Support multiple return instructions in a single basic block Add a .mir test to catch this case, and fix the xray-instrumentation pass to handle it appropriately. llvm-svn: 280192
2016-08-31 13:20:08 +08:00
body: |
bb.0:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $edi
[XRay] Support multiple return instructions in a single basic block Add a .mir test to catch this case, and fix the xray-instrumentation pass to handle it appropriately. llvm-svn: 280192
2016-08-31 13:20:08 +08:00
; CHECK: PATCHABLE_FUNCTION_ENTER
RETQ
GlobalISel: use G_TYPE to annotate physregs with a type. More preparation for dropping source types from MachineInstrs: regsters coming out of already-selected code (i.e. non-generic instructions) don't have a type, but that information is needed so we must add it manually. This is done via a new G_TYPE instruction. llvm-svn: 280292
2016-09-01 05:24:02 +08:00
; CHECK-NEXT: PATCHABLE_RET
[XRay] Support multiple return instructions in a single basic block Add a .mir test to catch this case, and fix the xray-instrumentation pass to handle it appropriately. llvm-svn: 280192
2016-08-31 13:20:08 +08:00
RETQ
GlobalISel: use G_TYPE to annotate physregs with a type. More preparation for dropping source types from MachineInstrs: regsters coming out of already-selected code (i.e. non-generic instructions) don't have a type, but that information is needed so we must add it manually. This is done via a new G_TYPE instruction. llvm-svn: 280292
2016-09-01 05:24:02 +08:00
; CHECK-NEXT: PATCHABLE_RET
[XRay] Support multiple return instructions in a single basic block Add a .mir test to catch this case, and fix the xray-instrumentation pass to handle it appropriately. llvm-svn: 280192
2016-08-31 13:20:08 +08:00
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