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llvm-project/llvm/test/CodeGen/X86/pic_jumptable.ll

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Partially FileCheck-ize a test to remove a weird quoting situation. llvm-svn: 134333
2011-07-03 04:42:20 +08:00
; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false \
; RUN: | FileCheck %s --check-prefix=CHECK-LINUX
Mark jump tables in code sections with DataRegion directives. Even out-of-line jump tables can be in the code section, so mark them as data-regions for those targets which support the directives. rdar://12362871&12362974 llvm-svn: 164571
2012-09-25 07:06:27 +08:00
; RUN: llc < %s -relocation-model=pic -mark-data-regions -mtriple=i686-apple-darwin -asm-verbose=false \
; RUN: | FileCheck %s --check-prefix=CHECK-DATA
Partially FileCheck-ize a test to remove a weird quoting situation. llvm-svn: 134333
2011-07-03 04:42:20 +08:00
; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false \
X86-Darwin: start emitting data-region directives for jump-tables. The surrounding tools can cope these days, and they were invented for a reason. llvm-svn: 268437
2016-05-04 05:03:41 +08:00
; RUN: | FileCheck %s --check-prefix=CHECK-DATA
Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81290
2009-09-09 07:54:48 +08:00
; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI'
On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body. llvm-svn: 73720
2009-06-19 04:37:15 +08:00
; rdar://6971437
Use .set expression for x86 pic jump table reference to reduce assembly relocation. rdar://7738756 llvm-svn: 101085
2010-04-13 07:07:17 +08:00
; rdar://7738756
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. llvm-svn: 30743
2006-10-05 11:12:36 +08:00
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax llvm-svn: 46850
2008-02-07 16:53:49 +08:00
declare void @_Z3bari(i32)
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. llvm-svn: 30743
2006-10-05 11:12:36 +08:00
Bring r226038 back. No change in this commit, but clang was changed to also produce trivial comdats when needed. Original message: Don't create new comdats in CodeGen. This patch stops the implicit creation of comdats during codegen. Clang now sets the comdat explicitly when it is required. With this patch clang and gcc now produce the same result in pr19848. llvm-svn: 226467
2015-01-19 23:16:06 +08:00
; CHECK-LINUX: _Z3fooILi1EEvi:
down with unwind info :) llvm-svn: 74206
2009-06-26 05:48:17 +08:00
define linkonce void @_Z3fooILi1EEvi(i32 %Y) nounwind {
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. llvm-svn: 30743
2006-10-05 11:12:36 +08:00
entry:
Start function numbering at 0. llvm-svn: 101638
2010-04-18 00:29:15 +08:00
; CHECK: L0$pb
Use .set expression for x86 pic jump table reference to reduce assembly relocation. rdar://7738756 llvm-svn: 101085
2010-04-13 07:07:17 +08:00
; CHECK-NOT: leal
Start function numbering at 0. llvm-svn: 101638
2010-04-18 00:29:15 +08:00
; CHECK: Ltmp0 = LJTI0_0-L0$pb
Use .set expression for x86 pic jump table reference to reduce assembly relocation. rdar://7738756 llvm-svn: 101085
2010-04-13 07:07:17 +08:00
; CHECK-NEXT: addl Ltmp0(%eax,%ecx,4)
; CHECK-NEXT: jmpl *%eax
Mark jump tables in code sections with DataRegion directives. Even out-of-line jump tables can be in the code section, so mark them as data-regions for those targets which support the directives. rdar://12362871&12362974 llvm-svn: 164571
2012-09-25 07:06:27 +08:00
;; When data-in-code markers are enabled, we should see them around the jump
;; table.
; CHECK-DATA: .data_region jt32
; CHECK-DATA: LJTI0_0
; CHECK-DATA: .end_data_region
;; When they're not enabled, make sure we don't see them at all.
; CHECK-NOT: .data_region
; CHECK-LINUX-NOT: .data_region
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax llvm-svn: 46850
2008-02-07 16:53:49 +08:00
%Y_addr = alloca i32 ; <i32*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
store i32 %Y, i32* %Y_addr
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp = load i32, i32* %Y_addr ; <i32> [#uses=1]
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax llvm-svn: 46850
2008-02-07 16:53:49 +08:00
switch i32 %tmp, label %bb10 [
i32 0, label %bb3
i32 1, label %bb
i32 2, label %bb
i32 3, label %bb
i32 4, label %bb
i32 5, label %bb
i32 6, label %bb
i32 7, label %bb
i32 8, label %bb
i32 9, label %bb
i32 10, label %bb
i32 12, label %bb1
i32 13, label %bb5
i32 14, label %bb6
i32 16, label %bb2
i32 17, label %bb4
i32 23, label %bb8
i32 27, label %bb7
i32 34, label %bb9
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. llvm-svn: 30743
2006-10-05 11:12:36 +08:00
]
bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
Re-commit r235560: Switch lowering: extract jump tables and bit tests before building binary tree (PR22262) Third time's the charm. The previous commit was reverted as a reverse for-loop in SelectionDAGBuilder::lowerWorkItem did 'I--' on an iterator at the beginning of a vector, causing asserts when using debugging iterators. This commit fixes that. llvm-svn: 235608
2015-04-24 00:45:24 +08:00
call void @_Z3bari( i32 0 )
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. llvm-svn: 30743
2006-10-05 11:12:36 +08:00
br label %bb1
bb1: ; preds = %bb, %entry
Re-commit r235560: Switch lowering: extract jump tables and bit tests before building binary tree (PR22262) Third time's the charm. The previous commit was reverted as a reverse for-loop in SelectionDAGBuilder::lowerWorkItem did 'I--' on an iterator at the beginning of a vector, causing asserts when using debugging iterators. This commit fixes that. llvm-svn: 235608
2015-04-24 00:45:24 +08:00
call void @_Z3bari( i32 1 )
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. llvm-svn: 30743
2006-10-05 11:12:36 +08:00
br label %bb2
bb2: ; preds = %bb1, %entry
Re-commit r235560: Switch lowering: extract jump tables and bit tests before building binary tree (PR22262) Third time's the charm. The previous commit was reverted as a reverse for-loop in SelectionDAGBuilder::lowerWorkItem did 'I--' on an iterator at the beginning of a vector, causing asserts when using debugging iterators. This commit fixes that. llvm-svn: 235608
2015-04-24 00:45:24 +08:00
call void @_Z3bari( i32 2 )
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. llvm-svn: 30743
2006-10-05 11:12:36 +08:00
br label %bb11
bb3: ; preds = %entry
br label %bb4
bb4: ; preds = %bb3, %entry
br label %bb5
bb5: ; preds = %bb4, %entry
br label %bb6
bb6: ; preds = %bb5, %entry
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax llvm-svn: 46850
2008-02-07 16:53:49 +08:00
call void @_Z3bari( i32 2 )
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. llvm-svn: 30743
2006-10-05 11:12:36 +08:00
br label %bb11
bb7: ; preds = %entry
br label %bb8
bb8: ; preds = %bb7, %entry
br label %bb9
bb9: ; preds = %bb8, %entry
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax llvm-svn: 46850
2008-02-07 16:53:49 +08:00
call void @_Z3bari( i32 3 )
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. llvm-svn: 30743
2006-10-05 11:12:36 +08:00
br label %bb11
bb10: ; preds = %entry
br label %bb11
bb11: ; preds = %bb10, %bb9, %bb6, %bb2
br label %return
return: ; preds = %bb11
ret void
}