2016-01-16 23:13:58 +08:00
|
|
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
2015-11-21 21:23:14 +08:00
|
|
|
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s
|
Add support for 256-bit versions of VPERMIL instruction. This is a new
instruction introduced in AVX, which can operate on 128 and 256-bit vectors.
It considers a 256-bit vector as two independent 128-bit lanes. It can permute
any 32 or 64 elements inside a lane, and restricts the second lane to
have the same permutation of the first one. With the improved splat support
introduced early today, adding codegen for this instruction enable more
efficient 256-bit code:
Instead of:
vextractf128 $0, %ymm0, %xmm0
punpcklbw %xmm0, %xmm0
punpckhbw %xmm0, %xmm0
vinsertf128 $0, %xmm0, %ymm0, %ymm1
vinsertf128 $1, %xmm0, %ymm1, %ymm0
vextractf128 $1, %ymm0, %xmm1
shufps $1, %xmm1, %xmm1
movss %xmm1, 28(%rsp)
movss %xmm1, 24(%rsp)
movss %xmm1, 20(%rsp)
movss %xmm1, 16(%rsp)
vextractf128 $0, %ymm0, %xmm0
shufps $1, %xmm0, %xmm0
movss %xmm0, 12(%rsp)
movss %xmm0, 8(%rsp)
movss %xmm0, 4(%rsp)
movss %xmm0, (%rsp)
vmovaps (%rsp), %ymm0
We get:
vextractf128 $0, %ymm0, %xmm0
punpcklbw %xmm0, %xmm0
punpckhbw %xmm0, %xmm0
vinsertf128 $0, %xmm0, %ymm0, %ymm1
vinsertf128 $1, %xmm0, %ymm1, %ymm0
vpermilps $85, %ymm0, %ymm0
llvm-svn: 135662
2011-07-21 09:55:47 +08:00
|
|
|
|
|
|
|
|
define <32 x i8> @funcA(<32 x i8> %a) nounwind uwtable readnone ssp {
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-LABEL: funcA:
|
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
|
; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5]
|
|
|
|
|
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
|
|
|
; CHECK-NEXT: retq
|
Add support for 256-bit versions of VPERMIL instruction. This is a new
instruction introduced in AVX, which can operate on 128 and 256-bit vectors.
It considers a 256-bit vector as two independent 128-bit lanes. It can permute
any 32 or 64 elements inside a lane, and restricts the second lane to
have the same permutation of the first one. With the improved splat support
introduced early today, adding codegen for this instruction enable more
efficient 256-bit code:
Instead of:
vextractf128 $0, %ymm0, %xmm0
punpcklbw %xmm0, %xmm0
punpckhbw %xmm0, %xmm0
vinsertf128 $0, %xmm0, %ymm0, %ymm1
vinsertf128 $1, %xmm0, %ymm1, %ymm0
vextractf128 $1, %ymm0, %xmm1
shufps $1, %xmm1, %xmm1
movss %xmm1, 28(%rsp)
movss %xmm1, 24(%rsp)
movss %xmm1, 20(%rsp)
movss %xmm1, 16(%rsp)
vextractf128 $0, %ymm0, %xmm0
shufps $1, %xmm0, %xmm0
movss %xmm0, 12(%rsp)
movss %xmm0, 8(%rsp)
movss %xmm0, 4(%rsp)
movss %xmm0, (%rsp)
vmovaps (%rsp), %ymm0
We get:
vextractf128 $0, %ymm0, %xmm0
punpcklbw %xmm0, %xmm0
punpckhbw %xmm0, %xmm0
vinsertf128 $0, %xmm0, %ymm0, %ymm1
vinsertf128 $1, %xmm0, %ymm1, %ymm0
vpermilps $85, %ymm0, %ymm0
llvm-svn: 135662
2011-07-21 09:55:47 +08:00
|
|
|
entry:
|
|
|
|
|
%shuffle = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
|
|
|
|
|
ret <32 x i8> %shuffle
|
|
|
|
|
}
|
|
|
|
|
|
2011-07-21 10:24:08 +08:00
|
|
|
define <16 x i16> @funcB(<16 x i16> %a) nounwind uwtable readnone ssp {
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-LABEL: funcB:
|
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
2016-01-22 06:07:41 +08:00
|
|
|
; CHECK-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,5,5,5]
|
|
|
|
|
; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,3,3]
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
|
|
|
; CHECK-NEXT: retq
|
2011-07-21 10:24:08 +08:00
|
|
|
entry:
|
|
|
|
|
%shuffle = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
|
|
|
|
|
ret <16 x i16> %shuffle
|
2015-01-27 05:28:32 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define <4 x i64> @funcC(i64 %q) nounwind uwtable readnone ssp {
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-LABEL: funcC:
|
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
|
; CHECK-NEXT: vmovq %rdi, %xmm0
|
|
|
|
|
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
|
|
|
|
|
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
|
|
|
; CHECK-NEXT: retq
|
2015-01-27 05:28:32 +08:00
|
|
|
entry:
|
2011-07-26 07:05:25 +08:00
|
|
|
%vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
|
|
|
|
|
%vecinit2.i = insertelement <4 x i64> %vecinit.i, i64 %q, i32 1
|
|
|
|
|
%vecinit4.i = insertelement <4 x i64> %vecinit2.i, i64 %q, i32 2
|
|
|
|
|
%vecinit6.i = insertelement <4 x i64> %vecinit4.i, i64 %q, i32 3
|
2015-01-27 05:28:32 +08:00
|
|
|
ret <4 x i64> %vecinit6.i
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define <4 x double> @funcD(double %q) nounwind uwtable readnone ssp {
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-LABEL: funcD:
|
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
|
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
|
|
|
|
|
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
|
|
|
; CHECK-NEXT: retq
|
2015-01-27 05:28:32 +08:00
|
|
|
entry:
|
2011-07-26 07:05:25 +08:00
|
|
|
%vecinit.i = insertelement <4 x double> undef, double %q, i32 0
|
|
|
|
|
%vecinit2.i = insertelement <4 x double> %vecinit.i, double %q, i32 1
|
|
|
|
|
%vecinit4.i = insertelement <4 x double> %vecinit2.i, double %q, i32 2
|
|
|
|
|
%vecinit6.i = insertelement <4 x double> %vecinit4.i, double %q, i32 3
|
|
|
|
|
ret <4 x double> %vecinit6.i
|
|
|
|
|
}
|
2015-01-27 05:28:32 +08:00
|
|
|
|
|
|
|
|
; Test this turns into a broadcast:
|
|
|
|
|
; shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
|
|
|
|
|
;
|
|
|
|
|
define <8 x float> @funcE() nounwind {
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-LABEL: funcE:
|
|
|
|
|
; CHECK: ## BB#0: ## %for_exit499
|
|
|
|
|
; CHECK-NEXT: xorl %eax, %eax
|
|
|
|
|
; CHECK-NEXT: ## implicit-def: %YMM0
|
|
|
|
|
; CHECK-NEXT: testb %al, %al
|
|
|
|
|
; CHECK-NEXT: jne LBB4_2
|
|
|
|
|
; CHECK-NEXT: ## BB#1: ## %load.i1247
|
2015-12-10 07:08:18 +08:00
|
|
|
; CHECK-NEXT: pushq %rbp
|
|
|
|
|
; CHECK-NEXT: movq %rsp, %rbp
|
|
|
|
|
; CHECK-NEXT: andq $-32, %rsp
|
|
|
|
|
; CHECK-NEXT: subq $1312, %rsp ## imm = 0x520
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-NEXT: vbroadcastss {{[0-9]+}}(%rsp), %ymm0
|
|
|
|
|
; CHECK-NEXT: movq %rbp, %rsp
|
|
|
|
|
; CHECK-NEXT: popq %rbp
|
2015-12-10 07:08:18 +08:00
|
|
|
; CHECK-NEXT: LBB4_2: ## %__load_and_broadcast_32.exit1249
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-NEXT: retq
|
2015-01-27 05:28:32 +08:00
|
|
|
allocas:
|
Make this kind of lowering to be supported by 256-bit instructions:
shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
To:
shuffle (vload ptr)), undef, <1, 1, 1, 1>
Fix PR10494
llvm-svn: 136691
2011-08-03 00:06:18 +08:00
|
|
|
%udx495 = alloca [18 x [18 x float]], align 32
|
|
|
|
|
br label %for_test505.preheader
|
|
|
|
|
|
|
|
|
|
for_test505.preheader: ; preds = %for_test505.preheader, %allocas
|
|
|
|
|
br i1 undef, label %for_exit499, label %for_test505.preheader
|
|
|
|
|
|
|
|
|
|
for_exit499: ; preds = %for_test505.preheader
|
|
|
|
|
br i1 undef, label %__load_and_broadcast_32.exit1249, label %load.i1247
|
|
|
|
|
|
|
|
|
|
load.i1247: ; preds = %for_exit499
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%ptr1227 = getelementptr [18 x [18 x float]], [18 x [18 x float]]* %udx495, i64 0, i64 1, i64 1
|
Make this kind of lowering to be supported by 256-bit instructions:
shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
To:
shuffle (vload ptr)), undef, <1, 1, 1, 1>
Fix PR10494
llvm-svn: 136691
2011-08-03 00:06:18 +08:00
|
|
|
%ptr.i1237 = bitcast float* %ptr1227 to i32*
|
2015-02-28 05:17:42 +08:00
|
|
|
%val.i1238 = load i32, i32* %ptr.i1237, align 4
|
Make this kind of lowering to be supported by 256-bit instructions:
shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
To:
shuffle (vload ptr)), undef, <1, 1, 1, 1>
Fix PR10494
llvm-svn: 136691
2011-08-03 00:06:18 +08:00
|
|
|
%ret6.i1245 = insertelement <8 x i32> undef, i32 %val.i1238, i32 6
|
|
|
|
|
%ret7.i1246 = insertelement <8 x i32> %ret6.i1245, i32 %val.i1238, i32 7
|
|
|
|
|
%phitmp = bitcast <8 x i32> %ret7.i1246 to <8 x float>
|
|
|
|
|
br label %__load_and_broadcast_32.exit1249
|
|
|
|
|
|
|
|
|
|
__load_and_broadcast_32.exit1249: ; preds = %load.i1247, %for_exit499
|
|
|
|
|
%load_broadcast12281250 = phi <8 x float> [ %phitmp, %load.i1247 ], [ undef, %for_exit499 ]
|
2011-08-11 10:49:44 +08:00
|
|
|
ret <8 x float> %load_broadcast12281250
|
Make this kind of lowering to be supported by 256-bit instructions:
shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
To:
shuffle (vload ptr)), undef, <1, 1, 1, 1>
Fix PR10494
llvm-svn: 136691
2011-08-03 00:06:18 +08:00
|
|
|
}
|
|
|
|
|
|
2011-08-17 10:29:15 +08:00
|
|
|
define <8 x float> @funcF(i32 %val) nounwind {
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-LABEL: funcF:
|
|
|
|
|
; CHECK: ## BB#0:
|
|
|
|
|
; CHECK-NEXT: vmovd %edi, %xmm0
|
2015-12-23 21:10:07 +08:00
|
|
|
; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,0]
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
|
|
|
; CHECK-NEXT: retq
|
2011-08-11 10:49:41 +08:00
|
|
|
%ret6 = insertelement <8 x i32> undef, i32 %val, i32 6
|
|
|
|
|
%ret7 = insertelement <8 x i32> %ret6, i32 %val, i32 7
|
|
|
|
|
%tmp = bitcast <8 x i32> %ret7 to <8 x float>
|
|
|
|
|
ret <8 x float> %tmp
|
|
|
|
|
}
|
|
|
|
|
|
2011-08-11 10:49:44 +08:00
|
|
|
define <8 x float> @funcG(<8 x float> %a) nounwind uwtable readnone ssp {
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-LABEL: funcG:
|
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
|
; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
|
|
|
|
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
|
|
|
; CHECK-NEXT: retq
|
2011-08-11 10:49:44 +08:00
|
|
|
entry:
|
|
|
|
|
%shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
|
|
|
|
|
ret <8 x float> %shuffle
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define <8 x float> @funcH(<8 x float> %a) nounwind uwtable readnone ssp {
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-LABEL: funcH:
|
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
2016-02-14 05:54:04 +08:00
|
|
|
; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,1,1,1,5,5,5,5]
|
|
|
|
|
; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
|
2015-11-21 21:23:14 +08:00
|
|
|
; CHECK-NEXT: retq
|
2011-08-11 10:49:44 +08:00
|
|
|
entry:
|
|
|
|
|
%shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
|
|
|
|
|
ret <8 x float> %shuffle
|
|
|
|
|
}
|
2015-11-23 00:52:16 +08:00
|
|
|
|
|
|
|
|
define <2 x double> @splat_load_2f64_11(<2 x double>* %ptr) {
|
|
|
|
|
; CHECK-LABEL: splat_load_2f64_11:
|
|
|
|
|
; CHECK: ## BB#0:
|
2016-03-02 19:43:05 +08:00
|
|
|
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
|
2015-11-23 00:52:16 +08:00
|
|
|
; CHECK-NEXT: retq
|
|
|
|
|
%x = load <2 x double>, <2 x double>* %ptr
|
|
|
|
|
%x1 = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> <i32 1, i32 1>
|
|
|
|
|
ret <2 x double> %x1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define <4 x double> @splat_load_4f64_2222(<4 x double>* %ptr) {
|
|
|
|
|
; CHECK-LABEL: splat_load_4f64_2222:
|
|
|
|
|
; CHECK: ## BB#0:
|
2015-12-09 06:17:11 +08:00
|
|
|
; CHECK-NEXT: vbroadcastsd 16(%rdi), %ymm0
|
2015-11-23 00:52:16 +08:00
|
|
|
; CHECK-NEXT: retq
|
|
|
|
|
%x = load <4 x double>, <4 x double>* %ptr
|
|
|
|
|
%x1 = shufflevector <4 x double> %x, <4 x double> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
|
|
|
|
|
ret <4 x double> %x1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define <4 x float> @splat_load_4f32_0000(<4 x float>* %ptr) {
|
|
|
|
|
; CHECK-LABEL: splat_load_4f32_0000:
|
|
|
|
|
; CHECK: ## BB#0:
|
2015-12-09 06:17:11 +08:00
|
|
|
; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
|
2015-11-23 00:52:16 +08:00
|
|
|
; CHECK-NEXT: retq
|
|
|
|
|
%x = load <4 x float>, <4 x float>* %ptr
|
|
|
|
|
%x1 = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
|
|
|
|
|
ret <4 x float> %x1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define <8 x float> @splat_load_8f32_77777777(<8 x float>* %ptr) {
|
|
|
|
|
; CHECK-LABEL: splat_load_8f32_77777777:
|
|
|
|
|
; CHECK: ## BB#0:
|
2015-12-09 06:17:11 +08:00
|
|
|
; CHECK-NEXT: vbroadcastss 28(%rdi), %ymm0
|
2015-11-23 00:52:16 +08:00
|
|
|
; CHECK-NEXT: retq
|
|
|
|
|
%x = load <8 x float>, <8 x float>* %ptr
|
|
|
|
|
%x1 = shufflevector <8 x float> %x, <8 x float> undef, <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
|
|
|
|
|
ret <8 x float> %x1
|
|
|
|
|
}
|