maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen/ARM/vst4.ll

80 lines
2.8 KiB
LLVM
Raw Normal View History

Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81293
2009-09-09 08:09:15 +08:00
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
Implement Neon VST[234] operations. llvm-svn: 78330
2009-08-07 02:47:44 +08:00
define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind {
;CHECK: vst4i8:
;CHECK: vst4.8
%tmp1 = load <8 x i8>* %B
Use vAny type to get rid of Neon intrinsics that differed only in whether the overloaded vector types allowed floating-point or integer vector elements. Most of these operations actually depend on the element type, so bitcasting was not an option. If you include the vpadd intrinsics that I updated earlier, this gets rid of 20 intrinsics. llvm-svn: 78646
2009-08-11 13:39:44 +08:00
call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1)
Implement Neon VST[234] operations. llvm-svn: 78330
2009-08-07 02:47:44 +08:00
ret void
}
define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind {
;CHECK: vst4i16:
;CHECK: vst4.16
%tmp1 = load <4 x i16>* %B
Use vAny type to get rid of Neon intrinsics that differed only in whether the overloaded vector types allowed floating-point or integer vector elements. Most of these operations actually depend on the element type, so bitcasting was not an option. If you include the vpadd intrinsics that I updated earlier, this gets rid of 20 intrinsics. llvm-svn: 78646
2009-08-11 13:39:44 +08:00
call void @llvm.arm.neon.vst4.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1)
Implement Neon VST[234] operations. llvm-svn: 78330
2009-08-07 02:47:44 +08:00
ret void
}
define void @vst4i32(i32* %A, <2 x i32>* %B) nounwind {
;CHECK: vst4i32:
;CHECK: vst4.32
%tmp1 = load <2 x i32>* %B
Use vAny type to get rid of Neon intrinsics that differed only in whether the overloaded vector types allowed floating-point or integer vector elements. Most of these operations actually depend on the element type, so bitcasting was not an option. If you include the vpadd intrinsics that I updated earlier, this gets rid of 20 intrinsics. llvm-svn: 78646
2009-08-11 13:39:44 +08:00
call void @llvm.arm.neon.vst4.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1)
Implement Neon VST[234] operations. llvm-svn: 78330
2009-08-07 02:47:44 +08:00
ret void
}
define void @vst4f(float* %A, <2 x float>* %B) nounwind {
;CHECK: vst4f:
;CHECK: vst4.32
%tmp1 = load <2 x float>* %B
Use vAny type to get rid of Neon intrinsics that differed only in whether the overloaded vector types allowed floating-point or integer vector elements. Most of these operations actually depend on the element type, so bitcasting was not an option. If you include the vpadd intrinsics that I updated earlier, this gets rid of 20 intrinsics. llvm-svn: 78646
2009-08-11 13:39:44 +08:00
call void @llvm.arm.neon.vst4.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1)
Implement Neon VST[234] operations. llvm-svn: 78330
2009-08-07 02:47:44 +08:00
ret void
}
Add codegen support for NEON vst4 intrinsics with 128-bit vectors. llvm-svn: 83486
2009-10-08 04:49:18 +08:00
define void @vst4Qi8(i8* %A, <16 x i8>* %B) nounwind {
;CHECK: vst4Qi8:
;CHECK: vst4.8
;CHECK: vst4.8
%tmp1 = load <16 x i8>* %B
call void @llvm.arm.neon.vst4.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1)
ret void
}
define void @vst4Qi16(i16* %A, <8 x i16>* %B) nounwind {
;CHECK: vst4Qi16:
;CHECK: vst4.16
;CHECK: vst4.16
%tmp1 = load <8 x i16>* %B
call void @llvm.arm.neon.vst4.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1)
ret void
}
define void @vst4Qi32(i32* %A, <4 x i32>* %B) nounwind {
;CHECK: vst4Qi32:
;CHECK: vst4.32
;CHECK: vst4.32
%tmp1 = load <4 x i32>* %B
call void @llvm.arm.neon.vst4.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1)
ret void
}
define void @vst4Qf(float* %A, <4 x float>* %B) nounwind {
;CHECK: vst4Qf:
;CHECK: vst4.32
;CHECK: vst4.32
%tmp1 = load <4 x float>* %B
call void @llvm.arm.neon.vst4.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1)
ret void
}
Use vAny type to get rid of Neon intrinsics that differed only in whether the overloaded vector types allowed floating-point or integer vector elements. Most of these operations actually depend on the element type, so bitcasting was not an option. If you include the vpadd intrinsics that I updated earlier, this gets rid of 20 intrinsics. llvm-svn: 78646
2009-08-11 13:39:44 +08:00
declare void @llvm.arm.neon.vst4.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind
declare void @llvm.arm.neon.vst4.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) nounwind
declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) nounwind
declare void @llvm.arm.neon.vst4.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>) nounwind
Add codegen support for NEON vst4 intrinsics with 128-bit vectors. llvm-svn: 83486
2009-10-08 04:49:18 +08:00
declare void @llvm.arm.neon.vst4.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) nounwind
declare void @llvm.arm.neon.vst4.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) nounwind
declare void @llvm.arm.neon.vst4.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) nounwind
declare void @llvm.arm.neon.vst4.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>) nounwind