forked from OSchip/llvm-project
34 lines
1.3 KiB
LLVM
34 lines
1.3 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
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; This tests is checking for a case where the x86 load-op-store fusion
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; misses a dependence between the fused load and a non-fused operand
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; to the load causing a cycle. Here the dependence in question comes
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; from the carry in input of the adcl.
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@vx = external local_unnamed_addr global <2 x i32>, align 8
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define void @pr36274(i32* %somewhere) {
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; CHECK-LABEL: pr36274:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl vx+4, %eax
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; CHECK-NEXT: addl $1, vx
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; CHECK-NEXT: adcl $0, %eax
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; CHECK-NEXT: movl %eax, vx+4
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; CHECK-NEXT: retl
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%a0 = getelementptr <2 x i32>, <2 x i32>* @vx, i32 0, i32 0
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%a1 = getelementptr <2 x i32>, <2 x i32>* @vx, i32 0, i32 1
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%x1 = load volatile i32, i32* %a1, align 4
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%x0 = load volatile i32, i32* %a0, align 8
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%vx0 = insertelement <2 x i32> undef, i32 %x0, i32 0
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%vx1 = insertelement <2 x i32> %vx0, i32 %x1, i32 1
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%x = bitcast <2 x i32> %vx1 to i64
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%add = add i64 %x, 1
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%vadd = bitcast i64 %add to <2 x i32>
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%vx1_0 = extractelement <2 x i32> %vadd, i32 0
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%vx1_1 = extractelement <2 x i32> %vadd, i32 1
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store i32 %vx1_0, i32* %a0, align 8
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store i32 %vx1_1, i32* %a1, align 4
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ret void
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}
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