forked from OSchip/llvm-project
40 lines
1.6 KiB
LLVM
40 lines
1.6 KiB
LLVM
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,HSA,HSA-NOENV %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa-opencl -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,HSA,HSA-OPENCL %s
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MESA %s
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; GCN-LABEL: {{^}}kernel_implicitarg_ptr_empty:
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; GCN: enable_sgpr_kernarg_segment_ptr = 1
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; HSA-NOENV: kernarg_segment_byte_size = 0
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; HSA-OPENCL: kernarg_segment_byte_size = 32
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; MESA: kernarg_segment_byte_size = 16
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; HSA: s_load_dword s0, s[4:5], 0x0
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define amdgpu_kernel void @kernel_implicitarg_ptr_empty() #0 {
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%implicitarg.ptr = call i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
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%cast = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)*
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%load = load volatile i32, i32 addrspace(2)* %cast
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ret void
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}
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; GCN-LABEL: {{^}}kernel_implicitarg_ptr:
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; GCN: enable_sgpr_kernarg_segment_ptr = 1
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; HSA-NOENV: kernarg_segment_byte_size = 112
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; HSA-OPENCL: kernarg_segment_byte_size = 144
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; MESA: kernarg_segment_byte_size = 464
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; HSA: s_load_dword s0, s[4:5], 0x1c
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define amdgpu_kernel void @kernel_implicitarg_ptr([112 x i8]) #0 {
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%implicitarg.ptr = call i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
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%cast = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)*
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%load = load volatile i32, i32 addrspace(2)* %cast
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ret void
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}
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declare i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr() #2
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attributes #0 = { nounwind noinline }
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attributes #1 = { nounwind noinline }
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attributes #2 = { nounwind readnone speculatable }
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