forked from OSchip/llvm-project
201 lines
9.0 KiB
LLVM
201 lines
9.0 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -loop-predication -loop-predication-enable-iv-truncation=true < %s 2>&1 | FileCheck %s
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declare void @llvm.experimental.guard(i1, ...)
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declare i32 @length(i8*)
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declare i16 @short_length(i8*)
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; Consider range check of type i16 and i32, while IV is of type i64
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; We can loop predicate this because the IV range is within i16 and within i32.
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define i64 @iv_wider_type_rc_two_narrow_types(i32 %offA, i16 %offB, i8* %arrA, i8* %arrB) {
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; CHECK-LABEL: @iv_wider_type_rc_two_narrow_types(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LENGTHA:%.*]] = call i32 @length(i8* [[ARRA:%.*]])
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; CHECK-NEXT: [[LENGTHB:%.*]] = call i16 @short_length(i8* [[ARRB:%.*]])
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; CHECK-NEXT: [[TMP0:%.*]] = sub i16 [[LENGTHB]], [[OFFB:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i16 16, [[TMP0]]
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i16 [[OFFB]], [[LENGTHB]]
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; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
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; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[LENGTHA]], [[OFFA:%.*]]
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; CHECK-NEXT: [[TMP5:%.*]] = icmp ule i32 16, [[TMP4]]
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; CHECK-NEXT: [[TMP6:%.*]] = icmp ult i32 [[OFFA]], [[LENGTHA]]
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; CHECK-NEXT: [[TMP7:%.*]] = and i1 [[TMP6]], [[TMP5]]
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; CHECK-NEXT: [[TMP8:%.*]] = and i1 [[TMP3]], [[TMP7]]
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[IV_TRUNC_32:%.*]] = trunc i64 [[IV]] to i32
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; CHECK-NEXT: [[IV_TRUNC_16:%.*]] = trunc i64 [[IV]] to i16
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; CHECK-NEXT: [[INDEXA:%.*]] = add i32 [[IV_TRUNC_32]], [[OFFA]]
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; CHECK-NEXT: [[INDEXB:%.*]] = add i16 [[IV_TRUNC_16]], [[OFFB]]
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP8]], i32 9) [ "deopt"() ]
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; CHECK-NEXT: [[INDEXA_EXT:%.*]] = zext i32 [[INDEXA]] to i64
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; CHECK-NEXT: [[ADDRA:%.*]] = getelementptr inbounds i8, i8* [[ARRA]], i64 [[INDEXA_EXT]]
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; CHECK-NEXT: [[ELTA:%.*]] = load i8, i8* [[ADDRA]]
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; CHECK-NEXT: [[INDEXB_EXT:%.*]] = zext i16 [[INDEXB]] to i64
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; CHECK-NEXT: [[ADDRB:%.*]] = getelementptr inbounds i8, i8* [[ARRB]], i64 [[INDEXB_EXT]]
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; CHECK-NEXT: store i8 [[ELTA]], i8* [[ADDRB]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[LATCH_CHECK:%.*]] = icmp ult i64 [[IV_NEXT]], 16
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; CHECK-NEXT: br i1 [[LATCH_CHECK]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], [[LOOP]] ]
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; CHECK-NEXT: ret i64 [[IV_LCSSA]]
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;
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entry:
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%lengthA = call i32 @length(i8* %arrA)
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%lengthB = call i16 @short_length(i8* %arrB)
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br label %loop
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loop:
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%iv = phi i64 [0, %entry ], [ %iv.next, %loop ]
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%iv.trunc.32 = trunc i64 %iv to i32
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%iv.trunc.16 = trunc i64 %iv to i16
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%indexA = add i32 %iv.trunc.32, %offA
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%indexB = add i16 %iv.trunc.16, %offB
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%rcA = icmp ult i32 %indexA, %lengthA
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%rcB = icmp ult i16 %indexB, %lengthB
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%wide.chk = and i1 %rcA, %rcB
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call void (i1, ...) @llvm.experimental.guard(i1 %wide.chk, i32 9) [ "deopt"() ]
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%indexA.ext = zext i32 %indexA to i64
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%addrA = getelementptr inbounds i8, i8* %arrA, i64 %indexA.ext
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%eltA = load i8, i8* %addrA
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%indexB.ext = zext i16 %indexB to i64
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%addrB = getelementptr inbounds i8, i8* %arrB, i64 %indexB.ext
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store i8 %eltA, i8* %addrB
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%iv.next = add nuw nsw i64 %iv, 1
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%latch.check = icmp ult i64 %iv.next, 16
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br i1 %latch.check, label %loop, label %exit
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exit:
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ret i64 %iv
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}
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; Consider an IV of type long and an array access into int array.
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; IV is of type i64 while the range check operands are of type i32 and i64.
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define i64 @iv_rc_different_types(i32 %offA, i32 %offB, i8* %arrA, i8* %arrB, i64 %max)
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; CHECK-LABEL: @iv_rc_different_types(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LENGTHA:%.*]] = call i32 @length(i8* [[ARRA:%.*]])
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; CHECK-NEXT: [[LENGTHB:%.*]] = call i32 @length(i8* [[ARRB:%.*]])
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTHB]], -1
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; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[OFFB:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ule i32 15, [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[OFFB]], [[LENGTHB]]
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; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[TMP2]]
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; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[MAX:%.*]], -1
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; CHECK-NEXT: [[TMP6:%.*]] = icmp ule i64 15, [[TMP5]]
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; CHECK-NEXT: [[TMP7:%.*]] = icmp ult i64 0, [[MAX]]
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; CHECK-NEXT: [[TMP8:%.*]] = and i1 [[TMP7]], [[TMP6]]
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; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[LENGTHA]], -1
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; CHECK-NEXT: [[TMP10:%.*]] = sub i32 [[TMP9]], [[OFFA:%.*]]
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; CHECK-NEXT: [[TMP11:%.*]] = icmp ule i32 15, [[TMP10]]
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; CHECK-NEXT: [[TMP12:%.*]] = icmp ult i32 [[OFFA]], [[LENGTHA]]
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; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP12]], [[TMP11]]
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; CHECK-NEXT: [[TMP14:%.*]] = and i1 [[TMP4]], [[TMP8]]
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; CHECK-NEXT: [[TMP15:%.*]] = and i1 [[TMP14]], [[TMP13]]
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV]] to i32
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; CHECK-NEXT: [[INDEXA:%.*]] = add i32 [[IV_TRUNC]], [[OFFA]]
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; CHECK-NEXT: [[INDEXB:%.*]] = add i32 [[IV_TRUNC]], [[OFFB]]
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP15]], i32 9) [ "deopt"() ]
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; CHECK-NEXT: [[INDEXA_EXT:%.*]] = zext i32 [[INDEXA]] to i64
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; CHECK-NEXT: [[ADDRA:%.*]] = getelementptr inbounds i8, i8* [[ARRA]], i64 [[INDEXA_EXT]]
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; CHECK-NEXT: [[ELTA:%.*]] = load i8, i8* [[ADDRA]]
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; CHECK-NEXT: [[INDEXB_EXT:%.*]] = zext i32 [[INDEXB]] to i64
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; CHECK-NEXT: [[ADDRB:%.*]] = getelementptr inbounds i8, i8* [[ARRB]], i64 [[INDEXB_EXT]]
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; CHECK-NEXT: [[ELTB:%.*]] = load i8, i8* [[ADDRB]]
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; CHECK-NEXT: [[RESULT:%.*]] = xor i8 [[ELTA]], [[ELTB]]
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; CHECK-NEXT: store i8 [[RESULT]], i8* [[ADDRA]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[LATCH_CHECK:%.*]] = icmp ult i64 [[IV]], 15
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; CHECK-NEXT: br i1 [[LATCH_CHECK]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], [[LOOP]] ]
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; CHECK-NEXT: ret i64 [[IV_LCSSA]]
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;
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{
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entry:
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%lengthA = call i32 @length(i8* %arrA)
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%lengthB = call i32 @length(i8* %arrB)
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br label %loop
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loop:
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%iv = phi i64 [0, %entry ], [ %iv.next, %loop ]
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%iv.trunc = trunc i64 %iv to i32
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%indexA = add i32 %iv.trunc, %offA
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%indexB = add i32 %iv.trunc, %offB
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%rcA = icmp ult i32 %indexA, %lengthA
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%rcIV = icmp ult i64 %iv, %max
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%wide.chk = and i1 %rcA, %rcIV
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%rcB = icmp ult i32 %indexB, %lengthB
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%wide.chk.final = and i1 %wide.chk, %rcB
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call void (i1, ...) @llvm.experimental.guard(i1 %wide.chk.final, i32 9) [ "deopt"() ]
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%indexA.ext = zext i32 %indexA to i64
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%addrA = getelementptr inbounds i8, i8* %arrA, i64 %indexA.ext
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%eltA = load i8, i8* %addrA
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%indexB.ext = zext i32 %indexB to i64
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%addrB = getelementptr inbounds i8, i8* %arrB, i64 %indexB.ext
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%eltB = load i8, i8* %addrB
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%result = xor i8 %eltA, %eltB
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store i8 %result, i8* %addrA
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%iv.next = add nuw nsw i64 %iv, 1
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%latch.check = icmp ult i64 %iv, 15
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br i1 %latch.check, label %loop, label %exit
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exit:
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ret i64 %iv
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}
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; cannot narrow the IV to the range type, because we lose information.
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; for (i64 i= 5; i>= 2; i++)
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; this loop wraps around after reaching 2^64.
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define i64 @iv_rc_different_type(i32 %offA, i8* %arrA) {
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; CHECK-LABEL: @iv_rc_different_type(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LENGTHA:%.*]] = call i32 @length(i8* [[ARRA:%.*]])
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 5, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[IV_TRUNC_32:%.*]] = trunc i64 [[IV]] to i32
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; CHECK-NEXT: [[INDEXA:%.*]] = add i32 [[IV_TRUNC_32]], [[OFFA:%.*]]
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; CHECK-NEXT: [[RCA:%.*]] = icmp ult i32 [[INDEXA]], [[LENGTHA]]
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[RCA]], i32 9) [ "deopt"() ]
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; CHECK-NEXT: [[INDEXA_EXT:%.*]] = zext i32 [[INDEXA]] to i64
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; CHECK-NEXT: [[ADDRA:%.*]] = getelementptr inbounds i8, i8* [[ARRA]], i64 [[INDEXA_EXT]]
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; CHECK-NEXT: [[ELTA:%.*]] = load i8, i8* [[ADDRA]]
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; CHECK-NEXT: [[RES:%.*]] = add i8 [[ELTA]], 2
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; CHECK-NEXT: store i8 [[ELTA]], i8* [[ADDRA]]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[LATCH_CHECK:%.*]] = icmp sge i64 [[IV_NEXT]], 2
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; CHECK-NEXT: br i1 [[LATCH_CHECK]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], [[LOOP]] ]
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; CHECK-NEXT: ret i64 [[IV_LCSSA]]
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;
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entry:
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%lengthA = call i32 @length(i8* %arrA)
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br label %loop
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loop:
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%iv = phi i64 [ 5, %entry ], [ %iv.next, %loop ]
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%iv.trunc.32 = trunc i64 %iv to i32
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%indexA = add i32 %iv.trunc.32, %offA
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%rcA = icmp ult i32 %indexA, %lengthA
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call void (i1, ...) @llvm.experimental.guard(i1 %rcA, i32 9) [ "deopt"() ]
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%indexA.ext = zext i32 %indexA to i64
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%addrA = getelementptr inbounds i8, i8* %arrA, i64 %indexA.ext
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%eltA = load i8, i8* %addrA
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%res = add i8 %eltA, 2
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store i8 %eltA, i8* %addrA
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%iv.next = add i64 %iv, 1
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%latch.check = icmp sge i64 %iv.next, 2
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br i1 %latch.check, label %loop, label %exit
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exit:
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ret i64 %iv
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}
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