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llvm-project/llvm/test/CodeGen/AMDGPU/subreg-intervals.mir

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Create subranges for new intervals resulting from live interval splitting The register allocator can split a live interval of a register into a set of smaller intervals. After the allocation of registers is complete, the rewriter will modify the IR to replace virtual registers with the corres- ponding physical registers. At this stage, if a register corresponding to a subregister of a virtual register is used, the rewriter will check if that subregister is undefined, and if so, it will add the <undef> flag to the machine operand. The function verifying liveness of the subregis- ter would assume that it is undefined, unless any of the subranges of the live interval proves otherwise. The problem is that the live intervals created during splitting do not have any subranges, even if the original parent interval did. This could result in the <undef> flag placed on a register that is actually defined. Differential Revision: http://reviews.llvm.org/D21189 llvm-svn: 279625
2016-08-24 21:37:55 +08:00
# RUN: llc -march=amdgcn -run-pass liveintervals -debug-only=regalloc -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: asserts
# CHECK: INTERVALS
# CHECK: vreg0
# CHECK-LABEL: Machine code for function test0:
# CHECK: INTERVALS
# CHECK: vreg0
# CHECK-LABEL: Machine code for function test1:
--- |
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test0() { ret void }
define amdgpu_kernel void @test1() { ret void }
Create subranges for new intervals resulting from live interval splitting The register allocator can split a live interval of a register into a set of smaller intervals. After the allocation of registers is complete, the rewriter will modify the IR to replace virtual registers with the corres- ponding physical registers. At this stage, if a register corresponding to a subregister of a virtual register is used, the rewriter will check if that subregister is undefined, and if so, it will add the <undef> flag to the machine operand. The function verifying liveness of the subregis- ter would assume that it is undefined, unless any of the subranges of the live interval proves otherwise. The problem is that the live intervals created during splitting do not have any subranges, even if the original parent interval did. This could result in the <undef> flag placed on a register that is actually defined. Differential Revision: http://reviews.llvm.org/D21189 llvm-svn: 279625
2016-08-24 21:37:55 +08:00
...
---
name: test0
registers:
- { id: 0, class: sreg_64 }
body: |
bb.0:
S_NOP 0, implicit-def %0
S_NOP 0, implicit %0
S_NOP 0, implicit-def undef %0.sub0
S_NOP 0, implicit %0
...
---
name: test1
registers:
- { id: 0, class: sreg_64 }
body: |
bb.0:
S_CBRANCH_VCCNZ %bb.1, implicit undef %vcc
S_BRANCH %bb.2
bb.1:
S_NOP 0, implicit-def undef %0.sub0
S_BRANCH %bb.3
bb.2:
S_NOP 0, implicit-def %0
S_BRANCH %bb.3
bb.3:
S_NOP 0
S_NOP 0, implicit %0
...