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llvm-project/llvm/test/CodeGen/AMDGPU/llvm.exp2.ll

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R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC
;RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM --check-prefix=FUNC
AMDGPU: Fix unnecessary ands when packing f16 vectors computeKnownBits didn't handle fp_to_fp16 to report the high bits as 0. ARM maps the generic node to an instruction that does not modify the high bits of the register, so introduce a target node where the high bits are known 0. llvm-svn: 297873
2017-03-16 03:04:26 +08:00
;RUN: llc < %s -march=amdgcn | FileCheck %s --check-prefix=SI --check-prefix=FUNC
R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s --check-prefix=SI --check-prefix=FUNC
R600: Fix input modifiers lost for Cayman llvm-svn: 196922
2013-12-10 22:43:27 +08:00
R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table llvm-svn: 218776
2014-10-02 01:15:17 +08:00
;FUNC-LABEL: {{^}}test:
R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
;EG: EXP_IEEE
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}}
;SI: v_exp_f32
R600: Fix input modifiers lost for Cayman llvm-svn: 196922
2013-12-10 22:43:27 +08:00
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test(float addrspace(1)* %out, float %in) {
R600: Expand vector fexp2 llvm-svn: 211375
2014-06-21 01:06:05 +08:00
entry:
%0 = call float @llvm.exp2.f32(float %in)
store float %0, float addrspace(1)* %out
R600: Fix input modifiers lost for Cayman llvm-svn: 196922
2013-12-10 22:43:27 +08:00
ret void
}
R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table llvm-svn: 218776
2014-10-02 01:15:17 +08:00
;FUNC-LABEL: {{^}}testv2:
R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
;EG: EXP_IEEE
;EG: EXP_IEEE
R600: Expand vector fexp2 llvm-svn: 211375
2014-06-21 01:06:05 +08:00
; FIXME: We should be able to merge these packets together on Cayman so we
; have a maximum of 4 instructions.
R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}}
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}}
;SI: v_exp_f32
;SI: v_exp_f32
R600: Expand vector fexp2 llvm-svn: 211375
2014-06-21 01:06:05 +08:00
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @testv2(<2 x float> addrspace(1)* %out, <2 x float> %in) {
R600: Expand vector fexp2 llvm-svn: 211375
2014-06-21 01:06:05 +08:00
entry:
%0 = call <2 x float> @llvm.exp2.v2f32(<2 x float> %in)
store <2 x float> %0, <2 x float> addrspace(1)* %out
ret void
}
R600: Fix input modifiers lost for Cayman llvm-svn: 196922
2013-12-10 22:43:27 +08:00
R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table llvm-svn: 218776
2014-10-02 01:15:17 +08:00
;FUNC-LABEL: {{^}}testv4:
R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
;EG: EXP_IEEE
;EG: EXP_IEEE
;EG: EXP_IEEE
;EG: EXP_IEEE
R600: Expand vector fexp2 llvm-svn: 211375
2014-06-21 01:06:05 +08:00
; FIXME: We should be able to merge these packets together on Cayman so we
; have a maximum of 4 instructions.
R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}}
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}}
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}}
;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}}
;SI: v_exp_f32
;SI: v_exp_f32
;SI: v_exp_f32
;SI: v_exp_f32
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @testv4(<4 x float> addrspace(1)* %out, <4 x float> %in) {
R600: Expand vector fexp2 llvm-svn: 211375
2014-06-21 01:06:05 +08:00
entry:
%0 = call <4 x float> @llvm.exp2.v4f32(<4 x float> %in)
store <4 x float> %0, <4 x float> addrspace(1)* %out
ret void
}
declare float @llvm.exp2.f32(float) readnone
declare <2 x float> @llvm.exp2.v2f32(<2 x float>) readnone
declare <4 x float> @llvm.exp2.v4f32(<4 x float>) readnone