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llvm-project/llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64le.ll

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[NewPM] Port Msan Summary: Keeping msan a function pass requires replacing the module level initialization: That means, don't define a ctor function which calls __msan_init, instead just declare the init function at the first access, and add that to the global ctors list. Changes: - Pull the actual sanitizer and the wrapper pass apart. - Add a newpm msan pass. The function pass inserts calls to runtime library functions, for which it inserts declarations as necessary. - Update tests. Caveats: - There is one test that I dropped, because it specifically tested the definition of the ctor. Reviewers: chandlerc, fedor.sergeev, leonardchan, vitalybuka Subscribers: sdardis, nemanjai, javed.absar, hiraditya, kbarton, bollu, atanasyan, jsji Differential Revision: https://reviews.llvm.org/D55647 llvm-svn: 350305
2019-01-03 21:42:44 +08:00
; RUN: opt < %s -S -passes=msan 2>&1 | FileCheck %s
[MSan] [PowerPC] Implement PowerPC64 vararg helper. Differential Revision: http://reviews.llvm.org/D20000 llvm-svn: 269518
2016-05-14 07:55:33 +08:00
; RUN: opt < %s -msan -S | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le--linux"
define i32 @foo(i32 %guard, ...) {
%vl = alloca i8*, align 8
%1 = bitcast i8** %vl to i8*
Add address space mangling to lifetime intrinsics In preparation for allowing allocas to have non-0 addrspace. llvm-svn: 299876
2017-04-11 04:18:21 +08:00
call void @llvm.lifetime.start.p0i8(i64 32, i8* %1)
[MSan] [PowerPC] Implement PowerPC64 vararg helper. Differential Revision: http://reviews.llvm.org/D20000 llvm-svn: 269518
2016-05-14 07:55:33 +08:00
call void @llvm.va_start(i8* %1)
call void @llvm.va_end(i8* %1)
Add address space mangling to lifetime intrinsics In preparation for allowing allocas to have non-0 addrspace. llvm-svn: 299876
2017-04-11 04:18:21 +08:00
call void @llvm.lifetime.end.p0i8(i64 32, i8* %1)
[MSan] [PowerPC] Implement PowerPC64 vararg helper. Differential Revision: http://reviews.llvm.org/D20000 llvm-svn: 269518
2016-05-14 07:55:33 +08:00
ret i32 0
}
; First, check allocation of the save area.
; CHECK-LABEL: @foo
; CHECK: [[A:%.*]] = load {{.*}} @__msan_va_arg_overflow_size_tls
; CHECK: [[B:%.*]] = add i64 0, [[A]]
; CHECK: [[C:%.*]] = alloca {{.*}} [[B]]
Reapply [IRBuilder] Always respect inserter/folder Some IRBuilder methods that were originally defined on IRBuilderBase do not respect custom IRBuilder inserters/folders, because those were not accessible prior to D73835. Fix this by making use of existing (and now accessible) IRBuilder methods, which will handle inserters/folders correctly. There are some changes in OpenMP and Instrumentation tests, where bitcasts now get constant folded. I've also highlighted one InstCombine test which now finishes in two rather than three iterations, thanks to new instructions being inserted into the worklist. Differential Revision: https://reviews.llvm.org/D74787
2020-02-19 03:35:16 +08:00
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[C]], i8* align 8 bitcast ({{.*}} @__msan_va_arg_tls to i8*), i64 [[B]], i1 false)
[MSan] [PowerPC] Implement PowerPC64 vararg helper. Differential Revision: http://reviews.llvm.org/D20000 llvm-svn: 269518
2016-05-14 07:55:33 +08:00
Add address space mangling to lifetime intrinsics In preparation for allowing allocas to have non-0 addrspace. llvm-svn: 299876
2017-04-11 04:18:21 +08:00
declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #1
[MSan] [PowerPC] Implement PowerPC64 vararg helper. Differential Revision: http://reviews.llvm.org/D20000 llvm-svn: 269518
2016-05-14 07:55:33 +08:00
declare void @llvm.va_start(i8*) #2
declare void @llvm.va_end(i8*) #2
Add address space mangling to lifetime intrinsics In preparation for allowing allocas to have non-0 addrspace. llvm-svn: 299876
2017-04-11 04:18:21 +08:00
declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1
[MSan] [PowerPC] Implement PowerPC64 vararg helper. Differential Revision: http://reviews.llvm.org/D20000 llvm-svn: 269518
2016-05-14 07:55:33 +08:00
define i32 @bar() {
%1 = call i32 (i32, ...) @foo(i32 0, i32 1, i64 2, double 3.000000e+00)
ret i32 %1
}
; Save the incoming shadow value from the arguments in the __msan_va_arg_tls
; array.
; CHECK-LABEL: @bar
; CHECK: store i32 0, i32* bitcast ([100 x i64]* @__msan_va_arg_tls to i32*), align 8
; CHECK: store i64 0, i64* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to i64*), align 8
; CHECK: store i64 0, i64* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 16) to i64*), align 8
; CHECK: store {{.*}} 24, {{.*}} @__msan_va_arg_overflow_size_tls
; Check vector argument.
define i32 @bar2() {
%1 = call i32 (i32, ...) @foo(i32 0, <2 x i64> <i64 1, i64 2>)
ret i32 %1
}
; The vector is at offset 16 of parameter save area, but __msan_va_arg_tls
; corresponds to offset 8+ of parameter save area - so the offset from
; __msan_va_arg_tls is actually misaligned.
; CHECK-LABEL: @bar2
; CHECK: store <2 x i64> zeroinitializer, <2 x i64>* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to <2 x i64>*), align 8
; CHECK: store {{.*}} 24, {{.*}} @__msan_va_arg_overflow_size_tls
; Check i64 array.
define i32 @bar4() {
%1 = call i32 (i32, ...) @foo(i32 0, [2 x i64] [i64 1, i64 2])
ret i32 %1
}
; CHECK-LABEL: @bar4
; CHECK: store [2 x i64] zeroinitializer, [2 x i64]* bitcast ([100 x i64]* @__msan_va_arg_tls to [2 x i64]*), align 8
; CHECK: store {{.*}} 16, {{.*}} @__msan_va_arg_overflow_size_tls
; Check i128 array.
define i32 @bar5() {
%1 = call i32 (i32, ...) @foo(i32 0, [2 x i128] [i128 1, i128 2])
ret i32 %1
}
; CHECK-LABEL: @bar5
; CHECK: store [2 x i128] zeroinitializer, [2 x i128]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to [2 x i128]*), align 8
; CHECK: store {{.*}} 40, {{.*}} @__msan_va_arg_overflow_size_tls
; Check 8-aligned byval.
define i32 @bar6([2 x i64]* %arg) {
%1 = call i32 (i32, ...) @foo(i32 0, [2 x i64]* byval align 8 %arg)
ret i32 %1
}
; CHECK-LABEL: @bar6
Reapply [IRBuilder] Always respect inserter/folder Some IRBuilder methods that were originally defined on IRBuilderBase do not respect custom IRBuilder inserters/folders, because those were not accessible prior to D73835. Fix this by making use of existing (and now accessible) IRBuilder methods, which will handle inserters/folders correctly. There are some changes in OpenMP and Instrumentation tests, where bitcasts now get constant folded. I've also highlighted one InstCombine test which now finishes in two rather than three iterations, thanks to new instructions being inserted into the worklist. Differential Revision: https://reviews.llvm.org/D74787
2020-02-19 03:35:16 +08:00
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 bitcast ([100 x i64]* @__msan_va_arg_tls to i8*), i8* align 8 {{.*}}, i64 16, i1 false)
[MSan] [PowerPC] Implement PowerPC64 vararg helper. Differential Revision: http://reviews.llvm.org/D20000 llvm-svn: 269518
2016-05-14 07:55:33 +08:00
; CHECK: store {{.*}} 16, {{.*}} @__msan_va_arg_overflow_size_tls
; Check 16-aligned byval.
define i32 @bar7([4 x i64]* %arg) {
%1 = call i32 (i32, ...) @foo(i32 0, [4 x i64]* byval align 16 %arg)
ret i32 %1
}
; CHECK-LABEL: @bar7
Reapply [IRBuilder] Always respect inserter/folder Some IRBuilder methods that were originally defined on IRBuilderBase do not respect custom IRBuilder inserters/folders, because those were not accessible prior to D73835. Fix this by making use of existing (and now accessible) IRBuilder methods, which will handle inserters/folders correctly. There are some changes in OpenMP and Instrumentation tests, where bitcasts now get constant folded. I've also highlighted one InstCombine test which now finishes in two rather than three iterations, thanks to new instructions being inserted into the worklist. Differential Revision: https://reviews.llvm.org/D74787
2020-02-19 03:35:16 +08:00
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_param_tls to i64), i64 8) to i8*), i8* align 8 {{.*}}, i64 32, i1 false)
[MSan] [PowerPC] Implement PowerPC64 vararg helper. Differential Revision: http://reviews.llvm.org/D20000 llvm-svn: 269518
2016-05-14 07:55:33 +08:00
; CHECK: store {{.*}} 40, {{.*}} @__msan_va_arg_overflow_size_tls
[MSan] Make sure variadic function arguments do not overflow __msan_va_arg_tls Turns out that calling a variadic function with too many (e.g. >100 i64's) arguments overflows __msan_va_arg_tls, which leads to smashing other TLS data with function argument shadow values. getShadow() already checks for kParamTLSSize and returns clean shadow if the argument does not fit, so just skip storing argument shadow for such arguments. llvm-svn: 341525
2018-09-06 16:21:54 +08:00
; Test that MSan doesn't generate code overflowing __msan_va_arg_tls when too many arguments are
; passed to a variadic function.
define dso_local i64 @many_args() {
entry:
%ret = call i64 (i64, ...) @sum(i64 120,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1
)
ret i64 %ret
}
; If the size of __msan_va_arg_tls changes the second argument of `add` must also be changed.
; CHECK-LABEL: @many_args
; CHECK: i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 792)
; CHECK-NOT: i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 800)
declare i64 @sum(i64 %n, ...)