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RegisterCoalescer: Defer clearing implicit_def lanes We can't go back and recover the lanes if it turns out the implicit_def really can't be erased. Assume all lanes are valid if an unresolved conflict is encountered. There aren't any tests where this seems to matter either way, but this seems like a safer option. Fixes bug 39602 llvm-svn: 350676
2019-01-09 07:10:47 +08:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-coalescing -run-pass=simple-register-coalescing -verify-machineinstrs -o - %s | FileCheck %s
# Bug 39602: Avoid "Couldn't join subrange" error when clearing valid
# lanes on an implicit_def that later cannot be erased.
---
name: lost_valid_lanes_maybe_erasable_implicit_def
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: lost_valid_lanes_maybe_erasable_implicit_def
; CHECK: bb.0:
; CHECK: successors: %bb.1(0x80000000)
; CHECK: undef %0.sub1:sreg_64 = IMPLICIT_DEF
; CHECK: bb.1:
; CHECK: %0.sub0:sreg_64 = S_MOV_B32 0
; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY %0
; CHECK: dead %0.sub1:sreg_64 = COPY %0.sub0
[AMDGPU] Add support for immediate operand for S_ENDPGM Summary: Add support for immediate operand in S_ENDPGM Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6 Reviewers: alexshap Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59213 llvm-svn: 355902
2019-03-12 17:52:58 +08:00
; CHECK: S_ENDPGM 0, implicit [[COPY]].sub1
RegisterCoalescer: Defer clearing implicit_def lanes We can't go back and recover the lanes if it turns out the implicit_def really can't be erased. Assume all lanes are valid if an unresolved conflict is encountered. There aren't any tests where this seems to matter either way, but this seems like a safer option. Fixes bug 39602 llvm-svn: 350676
2019-01-09 07:10:47 +08:00
bb.0:
successors: %bb.1
undef %0.sub1:sreg_64 = IMPLICIT_DEF
bb.1:
%0.sub0:sreg_64 = S_MOV_B32 0
%1:sreg_64 = COPY %0:sreg_64
dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
[AMDGPU] Add support for immediate operand for S_ENDPGM Summary: Add support for immediate operand in S_ENDPGM Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6 Reviewers: alexshap Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59213 llvm-svn: 355902
2019-03-12 17:52:58 +08:00
S_ENDPGM 0, implicit %1.sub1:sreg_64
RegisterCoalescer: Defer clearing implicit_def lanes We can't go back and recover the lanes if it turns out the implicit_def really can't be erased. Assume all lanes are valid if an unresolved conflict is encountered. There aren't any tests where this seems to matter either way, but this seems like a safer option. Fixes bug 39602 llvm-svn: 350676
2019-01-09 07:10:47 +08:00
...
---
# Same as previous, except with a real value instead of
# IMPLICIT_DEF. These should both be handled the same way.
name: lost_valid_lanes_real_value
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: lost_valid_lanes_real_value
; CHECK: bb.0:
; CHECK: successors: %bb.1(0x80000000)
; CHECK: undef %0.sub1:sreg_64 = S_MOV_B32 -1
; CHECK: bb.1:
; CHECK: %0.sub0:sreg_64 = S_MOV_B32 0
; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY %0
; CHECK: dead %0.sub1:sreg_64 = COPY %0.sub0
[AMDGPU] Add support for immediate operand for S_ENDPGM Summary: Add support for immediate operand in S_ENDPGM Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6 Reviewers: alexshap Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59213 llvm-svn: 355902
2019-03-12 17:52:58 +08:00
; CHECK: S_ENDPGM 0, implicit [[COPY]].sub1
RegisterCoalescer: Defer clearing implicit_def lanes We can't go back and recover the lanes if it turns out the implicit_def really can't be erased. Assume all lanes are valid if an unresolved conflict is encountered. There aren't any tests where this seems to matter either way, but this seems like a safer option. Fixes bug 39602 llvm-svn: 350676
2019-01-09 07:10:47 +08:00
bb.0:
successors: %bb.1
undef %0.sub1:sreg_64 = S_MOV_B32 -1
bb.1:
%0.sub0:sreg_64 = S_MOV_B32 0
%1:sreg_64 = COPY %0:sreg_64
dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
[AMDGPU] Add support for immediate operand for S_ENDPGM Summary: Add support for immediate operand in S_ENDPGM Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6 Reviewers: alexshap Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59213 llvm-svn: 355902
2019-03-12 17:52:58 +08:00
S_ENDPGM 0, implicit %1.sub1:sreg_64
RegisterCoalescer: Defer clearing implicit_def lanes We can't go back and recover the lanes if it turns out the implicit_def really can't be erased. Assume all lanes are valid if an unresolved conflict is encountered. There aren't any tests where this seems to matter either way, but this seems like a safer option. Fixes bug 39602 llvm-svn: 350676
2019-01-09 07:10:47 +08:00
...