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llvm-project/llvm/test/MC/Mips/expr1.s

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[mips] [IAS] Merge the micromips-expressions.s test into expr1.s. NFC. Summary: Also did some minor reformatting in the resulting test. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9702 llvm-svn: 237242
2015-05-13 17:53:53 +08:00
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -show-encoding | \
# RUN: FileCheck %s --check-prefix=32R2-EL
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=micromips -show-encoding | \
# RUN: FileCheck %s --check-prefix=MM-32R2-EL
Mips assembler: Enable handling of nested expressions This patch allows the Mips assembler to parse and emit nested expressions as instruction operands. It also extends the expansion of memory instructions when an offset is given as an expression. Contributer: Vladimir Medic llvm-svn: 179657
2013-04-17 08:18:04 +08:00
# Check that the assembler can handle the expressions as operands.
[mips] [IAS] Merge the micromips-expressions.s test into expr1.s. NFC. Summary: Also did some minor reformatting in the resulting test. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9702 llvm-svn: 237242
2015-05-13 17:53:53 +08:00
# 32R2-EL: .text
# 32R2-EL: .globl foo
# 32R2-EL: foo:
# 32R2-EL: lw $4, %lo(foo)($4) # encoding: [A,A,0x84,0x8c]
# 32R2-EL: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_Mips_LO16
# 32R2-EL: lw $4, 56($4) # encoding: [0x38,0x00,0x84,0x8c]
# 32R2-EL: lw $4, %lo(foo+8)($4) # encoding: [0x08'A',A,0x84,0x8c]
# 32R2-EL: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_Mips_LO16
# 32R2-EL: lw $4, %lo(foo+8)($4) # encoding: [0x08'A',A,0x84,0x8c]
# 32R2-EL: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_Mips_LO16
# 32R2-EL: lw $4, %lo(foo+8)($4) # encoding: [0x08'A',A,0x84,0x8c]
# 32R2-EL: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_Mips_LO16
[mips] [IAS] Fix parsing of memory offset expressions with parenthesis depth >1. Summary: In an expression such as "(((a+b)+c)+d)", parseParenExpression() would only parse the "a+b)+c", which would result in an error later on in the parser. This means that we can only parse one level of inner parentheses. In order to fix this, I added a new function called parseParenExprOfDepth(), which parses a specified number of trailing parenthesis expressions (except for the outermost parenthesis), and changed MipsAsmParser to use it in parseMemOffset instead of parseParenExpression(). Reviewers: dsanders, rafael Reviewed By: dsanders, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9742 llvm-svn: 240625
2015-06-25 17:52:02 +08:00
# 32R2-EL: lw $4, 10($4) # encoding: [0x0a,0x00,0x84,0x8c]
# 32R2-EL: lw $4, 15($4) # encoding: [0x0f,0x00,0x84,0x8c]
# 32R2-EL: lw $4, 21($4) # encoding: [0x15,0x00,0x84,0x8c]
# 32R2-EL: lw $4, 28($4) # encoding: [0x1c,0x00,0x84,0x8c]
# 32R2-EL: lw $4, 6($4) # encoding: [0x06,0x00,0x84,0x8c]
[mips] [IAS] Merge the micromips-expressions.s test into expr1.s. NFC. Summary: Also did some minor reformatting in the resulting test. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9702 llvm-svn: 237242
2015-05-13 17:53:53 +08:00
# 32R2-EL: .space 64
# MM-32R2-EL: .text
# MM-32R2-EL: .globl foo
# MM-32R2-EL: foo:
# MM-32R2-EL: lw $4, %lo(foo)($4) # encoding: [0x84'A',0xfc'A',0x00,0x00]
# MM-32R2-EL: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_MICROMIPS_LO16
# MM-32R2-EL: lw $4, 56($4) # encoding: [0x84,0xfc,0x38,0x00]
# MM-32R2-EL: lw $4, %lo(foo+8)($4) # encoding: [0x84'A',0xfc'A',0x08,0x00]
# MM-32R2-EL: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_MICROMIPS_LO16
# MM-32R2-EL: lw $4, %lo(foo+8)($4) # encoding: [0x84'A',0xfc'A',0x08,0x00]
# MM-32R2-EL: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_MICROMIPS_LO16
# MM-32R2-EL: lw $4, %lo(foo+8)($4) # encoding: [0x84'A',0xfc'A',0x08,0x00]
# MM-32R2-EL: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_MICROMIPS_LO16
[mips] [IAS] Fix parsing of memory offset expressions with parenthesis depth >1. Summary: In an expression such as "(((a+b)+c)+d)", parseParenExpression() would only parse the "a+b)+c", which would result in an error later on in the parser. This means that we can only parse one level of inner parentheses. In order to fix this, I added a new function called parseParenExprOfDepth(), which parses a specified number of trailing parenthesis expressions (except for the outermost parenthesis), and changed MipsAsmParser to use it in parseMemOffset instead of parseParenExpression(). Reviewers: dsanders, rafael Reviewed By: dsanders, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9742 llvm-svn: 240625
2015-06-25 17:52:02 +08:00
# MM-32R2-EL: lw $4, 10($4) # encoding: [0x84,0xfc,0x0a,0x00]
# MM-32R2-EL: lw $4, 15($4) # encoding: [0x84,0xfc,0x0f,0x00]
# MM-32R2-EL: lw $4, 21($4) # encoding: [0x84,0xfc,0x15,0x00]
# MM-32R2-EL: lw $4, 28($4) # encoding: [0x84,0xfc,0x1c,0x00]
# MM-32R2-EL: lw $4, 6($4) # encoding: [0x84,0xfc,0x06,0x00]
[mips] [IAS] Merge the micromips-expressions.s test into expr1.s. NFC. Summary: Also did some minor reformatting in the resulting test. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9702 llvm-svn: 237242
2015-05-13 17:53:53 +08:00
# MM-32R2-EL: .space 64
Mips assembler: Enable handling of nested expressions This patch allows the Mips assembler to parse and emit nested expressions as instruction operands. It also extends the expansion of memory instructions when an offset is given as an expression. Contributer: Vladimir Medic llvm-svn: 179657
2013-04-17 08:18:04 +08:00
.globl foo
.ent foo
foo:
lw $4,%lo(foo)($4)
lw $4,((10 + 4) * 4)($4)
lw $4,%lo (2 * 4) + foo($4)
lw $4,%lo((2 * 4) + foo)($4)
lw $4,(((%lo ((2 * 4) + foo))))($4)
[mips] [IAS] Fix parsing of memory offset expressions with parenthesis depth >1. Summary: In an expression such as "(((a+b)+c)+d)", parseParenExpression() would only parse the "a+b)+c", which would result in an error later on in the parser. This means that we can only parse one level of inner parentheses. In order to fix this, I added a new function called parseParenExprOfDepth(), which parses a specified number of trailing parenthesis expressions (except for the outermost parenthesis), and changed MipsAsmParser to use it in parseMemOffset instead of parseParenExpression(). Reviewers: dsanders, rafael Reviewed By: dsanders, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9742 llvm-svn: 240625
2015-06-25 17:52:02 +08:00
lw $4, (((1+2)+3)+4)($4)
lw $4, ((((1+2)+3)+4)+5)($4)
lw $4, (((((1+2)+3)+4)+5)+6)($4)
lw $4, ((((((1+2)+3)+4)+5)+6)+7)($4)
lw $4, (%lo((1+2)+65536)+3)($4)
Mips assembler: Enable handling of nested expressions This patch allows the Mips assembler to parse and emit nested expressions as instruction operands. It also extends the expansion of memory instructions when an offset is given as an expression. Contributer: Vladimir Medic llvm-svn: 179657
2013-04-17 08:18:04 +08:00
.space 64
.end foo