maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/DebugInfo/COFF/pieces.ll

441 lines
21 KiB
LLVM
Raw Normal View History

[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; RUN: llc < %s | FileCheck %s --check-prefix=ASM
; RUN: llc < %s -filetype=obj | llvm-readobj -codeview | FileCheck %s --check-prefix=OBJ
; Compile with -O1 as C
; struct IntPair { int x, y; };
; struct PadRight { long a; int b; };
; struct PadLeft { int a; long b; };
; struct Nested { struct PadLeft a[2]; };
;
; extern int g(int r);
; extern int i;
; extern int n;
;
; int loop_csr() {
; struct IntPair o = {0, 0};
; for (i = 0; i < n; i++) {
; o.x = g(o.x);
; o.y = g(o.y);
; }
; return o.x + o.y;
; }
;
; int pad_right(struct PadRight o) {
; return o.b;
; }
;
; int pad_left(struct PadLeft o) {
; return o.a;
; }
;
; int nested(struct Nested o) {
; struct PadLeft p = o.a[1];
; return p.b;
; }
; ASM-LABEL: loop_csr: # @loop_csr
Print complete DIExpressions in the assembler output DEBUG_VALUE comments. The previous code was complex, incorrect, and couldn't print everything. llvm-svn: 301333
2017-04-26 01:22:09 +08:00
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] 0
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] 0
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; ASM: # %bb.2: # %for.body.preheader
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: xorl %edi, %edi
; ASM: xorl %esi, %esi
; ASM: .p2align 4, 0x90
Using branch probability to guide critical edge splitting. Summary: The original heuristic to break critical edge during machine sink is relatively conservertive: when there is only one instruction sinkable to the critical edge, it is likely that the machine sink pass will not break the critical edge. This leads to many speculative instructions executed at runtime. However, with profile info, we could model the splitting benefits: if the critical edge has 50% taken rate, it would always be beneficial to split the critical edge to avoid the speculated runtime instructions. This patch uses profile to guide critical edge splitting in machine sink pass. The performance impact on speccpu2006 on Intel sandybridge machines: spec/2006/fp/C++/444.namd 25.3 +0.26% spec/2006/fp/C++/447.dealII 45.96 -0.10% spec/2006/fp/C++/450.soplex 41.97 +1.49% spec/2006/fp/C++/453.povray 36.83 -0.96% spec/2006/fp/C/433.milc 23.81 +0.32% spec/2006/fp/C/470.lbm 41.17 +0.34% spec/2006/fp/C/482.sphinx3 48.13 +0.69% spec/2006/int/C++/471.omnetpp 22.45 +3.25% spec/2006/int/C++/473.astar 21.35 -2.06% spec/2006/int/C++/483.xalancbmk 36.02 -2.39% spec/2006/int/C/400.perlbench 33.7 -0.17% spec/2006/int/C/401.bzip2 22.9 +0.52% spec/2006/int/C/403.gcc 32.42 -0.54% spec/2006/int/C/429.mcf 39.59 +0.19% spec/2006/int/C/445.gobmk 26.98 -0.00% spec/2006/int/C/456.hmmer 24.52 -0.18% spec/2006/int/C/458.sjeng 28.26 +0.02% spec/2006/int/C/462.libquantum 55.44 +3.74% spec/2006/int/C/464.h264ref 46.67 -0.39% geometric mean +0.20% Manually checked 473 and 471 to verify the diff is in the noise range. Reviewers: rengolin, davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D24818 llvm-svn: 284757
2016-10-21 02:06:52 +08:00
; ASM: .LBB0_3: # %for.body
[SelectionDAG] Improve selection of DBG_VALUE using a PHI node result Summary: When building the selection DAG at ISel all PHI nodes are selected and lowered to Machine Instruction PHI nodes before we start to create any SDNodes. So there are no SDNodes for values produced by the PHI nodes. In the past when selecting a dbg.value intrinsic that uses the value produced by a PHI node we have been handling such dbg.value intrinsics as "dangling debug info". I.e. we have not created a SDDbgValue node directly, because there is no existing SDNode for the PHI result, instead we deferred the creationg of a SDDbgValue until we found the first use of the PHI result. The old solution had a couple of flaws. The position of the selected DBG_VALUE instruction would end up quite late in a basic block, and for example not directly after the PHI node as in the LLVM IR input. And in case there were no use at all in the basic block the dbg.value could be dropped completely. This patch introduces a new VREG kind of SDDbgValue nodes. It is similar to a SDNODE kind of node, but it refers directly to a virtual register and not a SDNode. When we do selection for a dbg.value that is using the result of a PHI node we can do a lookup of the virtual register directly (as it already is determined for the PHI node) and create a SDDbgValue node immediately instead of delaying the selection until we find a use. This should fix a problem with losing debug info at ISel as seen in PR37234 (https://bugs.llvm.org/show_bug.cgi?id=37234). It does not resolve PR37234 completely, because the debug info is dropped later on in the BranchFolder (see D46184). Reviewers: #debug-info, aprantl Reviewed By: #debug-info, aprantl Subscribers: rnk, gbedwell, aprantl, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D46129 llvm-svn: 331182
2018-04-30 22:37:39 +08:00
; ASM: [[oy_ox_start:\.Ltmp[0-9]+]]:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] $edi
[SelectionDAG] Improve selection of DBG_VALUE using a PHI node result Summary: When building the selection DAG at ISel all PHI nodes are selected and lowered to Machine Instruction PHI nodes before we start to create any SDNodes. So there are no SDNodes for values produced by the PHI nodes. In the past when selecting a dbg.value intrinsic that uses the value produced by a PHI node we have been handling such dbg.value intrinsics as "dangling debug info". I.e. we have not created a SDDbgValue node directly, because there is no existing SDNode for the PHI result, instead we deferred the creationg of a SDDbgValue until we found the first use of the PHI result. The old solution had a couple of flaws. The position of the selected DBG_VALUE instruction would end up quite late in a basic block, and for example not directly after the PHI node as in the LLVM IR input. And in case there were no use at all in the basic block the dbg.value could be dropped completely. This patch introduces a new VREG kind of SDDbgValue nodes. It is similar to a SDNODE kind of node, but it refers directly to a virtual register and not a SDNode. When we do selection for a dbg.value that is using the result of a PHI node we can do a lookup of the virtual register directly (as it already is determined for the PHI node) and create a SDDbgValue node immediately instead of delaying the selection until we find a use. This should fix a problem with losing debug info at ISel as seen in PR37234 (https://bugs.llvm.org/show_bug.cgi?id=37234). It does not resolve PR37234 completely, because the debug info is dropped later on in the BranchFolder (see D46184). Reviewers: #debug-info, aprantl Reviewed By: #debug-info, aprantl Subscribers: rnk, gbedwell, aprantl, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D46129 llvm-svn: 331182
2018-04-30 22:37:39 +08:00
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] $esi
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: .cv_loc 0 1 13 11 # t.c:13:11
; ASM: movl %edi, %ecx
; ASM: callq g
; ASM: movl %eax, %edi
[SelectionDAG] Improve selection of DBG_VALUE using a PHI node result Summary: When building the selection DAG at ISel all PHI nodes are selected and lowered to Machine Instruction PHI nodes before we start to create any SDNodes. So there are no SDNodes for values produced by the PHI nodes. In the past when selecting a dbg.value intrinsic that uses the value produced by a PHI node we have been handling such dbg.value intrinsics as "dangling debug info". I.e. we have not created a SDDbgValue node directly, because there is no existing SDNode for the PHI result, instead we deferred the creationg of a SDDbgValue until we found the first use of the PHI result. The old solution had a couple of flaws. The position of the selected DBG_VALUE instruction would end up quite late in a basic block, and for example not directly after the PHI node as in the LLVM IR input. And in case there were no use at all in the basic block the dbg.value could be dropped completely. This patch introduces a new VREG kind of SDDbgValue nodes. It is similar to a SDNODE kind of node, but it refers directly to a virtual register and not a SDNode. When we do selection for a dbg.value that is using the result of a PHI node we can do a lookup of the virtual register directly (as it already is determined for the PHI node) and create a SDDbgValue node immediately instead of delaying the selection until we find a use. This should fix a problem with losing debug info at ISel as seen in PR37234 (https://bugs.llvm.org/show_bug.cgi?id=37234). It does not resolve PR37234 completely, because the debug info is dropped later on in the BranchFolder (see D46184). Reviewers: #debug-info, aprantl Reviewed By: #debug-info, aprantl Subscribers: rnk, gbedwell, aprantl, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D46129 llvm-svn: 331182
2018-04-30 22:37:39 +08:00
; ASM: [[ox_start:\.Ltmp[0-9]+]]:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] $edi
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: .cv_loc 0 1 14 11 # t.c:14:11
; ASM: movl %esi, %ecx
; ASM: callq g
; ASM: movl %eax, %esi
[SelectionDAG] Improve selection of DBG_VALUE using a PHI node result Summary: When building the selection DAG at ISel all PHI nodes are selected and lowered to Machine Instruction PHI nodes before we start to create any SDNodes. So there are no SDNodes for values produced by the PHI nodes. In the past when selecting a dbg.value intrinsic that uses the value produced by a PHI node we have been handling such dbg.value intrinsics as "dangling debug info". I.e. we have not created a SDDbgValue node directly, because there is no existing SDNode for the PHI result, instead we deferred the creationg of a SDDbgValue until we found the first use of the PHI result. The old solution had a couple of flaws. The position of the selected DBG_VALUE instruction would end up quite late in a basic block, and for example not directly after the PHI node as in the LLVM IR input. And in case there were no use at all in the basic block the dbg.value could be dropped completely. This patch introduces a new VREG kind of SDDbgValue nodes. It is similar to a SDNODE kind of node, but it refers directly to a virtual register and not a SDNode. When we do selection for a dbg.value that is using the result of a PHI node we can do a lookup of the virtual register directly (as it already is determined for the PHI node) and create a SDDbgValue node immediately instead of delaying the selection until we find a use. This should fix a problem with losing debug info at ISel as seen in PR37234 (https://bugs.llvm.org/show_bug.cgi?id=37234). It does not resolve PR37234 completely, because the debug info is dropped later on in the BranchFolder (see D46184). Reviewers: #debug-info, aprantl Reviewed By: #debug-info, aprantl Subscribers: rnk, gbedwell, aprantl, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D46129 llvm-svn: 331182
2018-04-30 22:37:39 +08:00
; ASM: [[oy_start:\.Ltmp[0-9]+]]:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] $esi
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: cmpl n(%rip), %eax
Using branch probability to guide critical edge splitting. Summary: The original heuristic to break critical edge during machine sink is relatively conservertive: when there is only one instruction sinkable to the critical edge, it is likely that the machine sink pass will not break the critical edge. This leads to many speculative instructions executed at runtime. However, with profile info, we could model the splitting benefits: if the critical edge has 50% taken rate, it would always be beneficial to split the critical edge to avoid the speculated runtime instructions. This patch uses profile to guide critical edge splitting in machine sink pass. The performance impact on speccpu2006 on Intel sandybridge machines: spec/2006/fp/C++/444.namd 25.3 +0.26% spec/2006/fp/C++/447.dealII 45.96 -0.10% spec/2006/fp/C++/450.soplex 41.97 +1.49% spec/2006/fp/C++/453.povray 36.83 -0.96% spec/2006/fp/C/433.milc 23.81 +0.32% spec/2006/fp/C/470.lbm 41.17 +0.34% spec/2006/fp/C/482.sphinx3 48.13 +0.69% spec/2006/int/C++/471.omnetpp 22.45 +3.25% spec/2006/int/C++/473.astar 21.35 -2.06% spec/2006/int/C++/483.xalancbmk 36.02 -2.39% spec/2006/int/C/400.perlbench 33.7 -0.17% spec/2006/int/C/401.bzip2 22.9 +0.52% spec/2006/int/C/403.gcc 32.42 -0.54% spec/2006/int/C/429.mcf 39.59 +0.19% spec/2006/int/C/445.gobmk 26.98 -0.00% spec/2006/int/C/456.hmmer 24.52 -0.18% spec/2006/int/C/458.sjeng 28.26 +0.02% spec/2006/int/C/462.libquantum 55.44 +3.74% spec/2006/int/C/464.h264ref 46.67 -0.39% geometric mean +0.20% Manually checked 473 and 471 to verify the diff is in the noise range. Reviewers: rengolin, davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D24818 llvm-svn: 284757
2016-10-21 02:06:52 +08:00
; ASM: jl .LBB0_3
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: [[oy_end:\.Ltmp[0-9]+]]:
; ASM: addl %edi, %esi
; ASM: movl %esi, %eax
; ASM-LABEL: pad_right: # @pad_right
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; ASM: #DEBUG_VALUE: pad_right:o <- [DW_OP_LLVM_fragment 32 32] $ecx
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: movl %ecx, %eax
; ASM: retq
; ASM-LABEL: pad_left: # @pad_left
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; ASM: #DEBUG_VALUE: pad_left:o <- [DW_OP_LLVM_fragment 0 32] $ecx
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: .cv_loc 2 1 24 3 # t.c:24:3
; ASM: movl %ecx, %eax
; ASM: retq
; ASM-LABEL: nested: # @nested
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; ASM: #DEBUG_VALUE: nested:o <- [DW_OP_deref] [$rcx+0]
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: movl 12(%rcx), %eax
; ASM: [[p_start:\.Ltmp[0-9]+]]:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; ASM: #DEBUG_VALUE: nested:p <- [DW_OP_LLVM_fragment 32 32] $eax
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: retq
; ASM-LABEL: bitpiece_spill: # @bitpiece_spill
Print complete DIExpressions in the assembler output DEBUG_VALUE comments. The previous code was complex, incorrect, and couldn't print everything. llvm-svn: 301333
2017-04-26 01:22:09 +08:00
; ASM: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_LLVM_fragment 0 32] 0
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: xorl %ecx, %ecx
; ASM: callq g
; ASM: movl %eax, [[offset_o_x:[0-9]+]](%rsp) # 4-byte Spill
; ASM: [[spill_o_x_start:\.Ltmp[0-9]+]]:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; ASM: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offset_o_x]], DW_OP_LLVM_fragment 32 32] [$rsp+0]
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: #APP
; ASM: #NO_APP
; ASM: movl [[offset_o_x]](%rsp), %eax # 4-byte Reload
; ASM: [[spill_o_x_end:\.Ltmp[0-9]+]]:
; ASM: retq
; ASM-LABEL: .short 4423 # Record kind: S_GPROC32_ID
; ASM: .asciz "loop_csr" # Function name
; ASM: .short 4414 # Record kind: S_LOCAL
; ASM: .asciz "o"
[SelectionDAG] Improve selection of DBG_VALUE using a PHI node result Summary: When building the selection DAG at ISel all PHI nodes are selected and lowered to Machine Instruction PHI nodes before we start to create any SDNodes. So there are no SDNodes for values produced by the PHI nodes. In the past when selecting a dbg.value intrinsic that uses the value produced by a PHI node we have been handling such dbg.value intrinsics as "dangling debug info". I.e. we have not created a SDDbgValue node directly, because there is no existing SDNode for the PHI result, instead we deferred the creationg of a SDDbgValue until we found the first use of the PHI result. The old solution had a couple of flaws. The position of the selected DBG_VALUE instruction would end up quite late in a basic block, and for example not directly after the PHI node as in the LLVM IR input. And in case there were no use at all in the basic block the dbg.value could be dropped completely. This patch introduces a new VREG kind of SDDbgValue nodes. It is similar to a SDNODE kind of node, but it refers directly to a virtual register and not a SDNode. When we do selection for a dbg.value that is using the result of a PHI node we can do a lookup of the virtual register directly (as it already is determined for the PHI node) and create a SDDbgValue node immediately instead of delaying the selection until we find a use. This should fix a problem with losing debug info at ISel as seen in PR37234 (https://bugs.llvm.org/show_bug.cgi?id=37234). It does not resolve PR37234 completely, because the debug info is dropped later on in the BranchFolder (see D46184). Reviewers: #debug-info, aprantl Reviewed By: #debug-info, aprantl Subscribers: rnk, gbedwell, aprantl, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D46129 llvm-svn: 331182
2018-04-30 22:37:39 +08:00
; ASM: .cv_def_range [[oy_ox_start]] [[ox_start]], "C\021\030\000\000\000\000\000\000\000"
; ASM: .cv_def_range [[oy_ox_start]] [[oy_start]], "C\021\027\000\000\000\004\000\000\000"
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: .cv_def_range [[ox_start]] .Lfunc_end0, "C\021\030\000\000\000\000\000\000\000"
; ASM: .cv_def_range [[oy_start]] [[oy_end]], "C\021\027\000\000\000\004\000\000\000"
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ-LABEL: {{.*}}Proc{{.*}}Sym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: Kind: S_GPROC32_ID (0x1147)
; OBJ: DisplayName: loop_csr
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: LocalSym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: VarName: o
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: DefRangeSubfieldRegisterSym {
[CodeView] Add prefix to CodeView registers. Adds CVReg to CodeView register names to prevent a duplicate symbol with CR3 defined in termios.h, as suggested by Zachary on the mailing list. http://lists.llvm.org/pipermail/llvm-dev/2018-May/123372.html Differential revision: https://reviews.llvm.org/D47478 rdar://39863705 llvm-svn: 333421
2018-05-29 22:35:34 +08:00
; OBJ: Register: CVRegEDI (0x18)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: MayHaveNoName: 0
; OBJ: OffsetInParent: 0
; OBJ: LocalVariableAddrRange {
; OBJ: }
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: DefRangeSubfieldRegisterSym {
[CodeView] Add prefix to CodeView registers. Adds CVReg to CodeView register names to prevent a duplicate symbol with CR3 defined in termios.h, as suggested by Zachary on the mailing list. http://lists.llvm.org/pipermail/llvm-dev/2018-May/123372.html Differential revision: https://reviews.llvm.org/D47478 rdar://39863705 llvm-svn: 333421
2018-05-29 22:35:34 +08:00
; OBJ: Register: CVRegESI (0x17)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: MayHaveNoName: 0
; OBJ: OffsetInParent: 4
; OBJ: LocalVariableAddrRange {
; OBJ: }
; OBJ: }
; OBJ: ProcEnd {
; OBJ: }
; ASM-LABEL: .short 4423 # Record kind: S_GPROC32_ID
; ASM: .asciz "pad_right" # Function name
; ASM: .short 4414 # Record kind: S_LOCAL
; ASM: .asciz "o"
; ASM: .cv_def_range .Lfunc_begin1 .Lfunc_end1, "C\021\022\000\000\000\004\000\000\000"
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ-LABEL: {{.*}}Proc{{.*}}Sym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: Kind: S_GPROC32_ID (0x1147)
; OBJ: DisplayName: pad_right
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: LocalSym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: VarName: o
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: DefRangeSubfieldRegisterSym {
[CodeView] Add prefix to CodeView registers. Adds CVReg to CodeView register names to prevent a duplicate symbol with CR3 defined in termios.h, as suggested by Zachary on the mailing list. http://lists.llvm.org/pipermail/llvm-dev/2018-May/123372.html Differential revision: https://reviews.llvm.org/D47478 rdar://39863705 llvm-svn: 333421
2018-05-29 22:35:34 +08:00
; OBJ: Register: CVRegECX (0x12)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: MayHaveNoName: 0
; OBJ: OffsetInParent: 4
; OBJ: LocalVariableAddrRange {
; OBJ: }
; OBJ: }
; OBJ: ProcEnd {
; OBJ: }
; ASM-LABEL: .short 4423 # Record kind: S_GPROC32_ID
; ASM: .asciz "pad_left" # Function name
; ASM: .short 4414 # Record kind: S_LOCAL
; ASM: .asciz "o"
; ASM: .cv_def_range .Lfunc_begin2 .Lfunc_end2, "C\021\022\000\000\000\000\000\000\000"
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ-LABEL: {{.*}}Proc{{.*}}Sym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: Kind: S_GPROC32_ID (0x1147)
; OBJ: DisplayName: pad_left
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: LocalSym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: VarName: o
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: DefRangeSubfieldRegisterSym {
[CodeView] Add prefix to CodeView registers. Adds CVReg to CodeView register names to prevent a duplicate symbol with CR3 defined in termios.h, as suggested by Zachary on the mailing list. http://lists.llvm.org/pipermail/llvm-dev/2018-May/123372.html Differential revision: https://reviews.llvm.org/D47478 rdar://39863705 llvm-svn: 333421
2018-05-29 22:35:34 +08:00
; OBJ: Register: CVRegECX (0x12)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: MayHaveNoName: 0
; OBJ: OffsetInParent: 0
; OBJ: LocalVariableAddrRange {
; OBJ: }
; OBJ: }
; OBJ: ProcEnd {
; OBJ: }
; ASM-LABEL: .short 4423 # Record kind: S_GPROC32_ID
; ASM: .asciz "nested" # Function name
; ASM: .short 4414 # Record kind: S_LOCAL
; ASM: .asciz "o"
Reland r311957 [codeview] support more DW_OPs for more complete debug info Summary: Some variables show up in Visual Studio as "optimized out" even in -O0 -Od builds. This change fixes two issues that would cause this to happen. The first issue is that not all DIExpressions we generate were recognized by the CodeView writer. This has been addressed by adding support for DW_OP_constu, DW_OP_minus, and DW_OP_plus. The second issue is that we had no way to encode DW_OP_deref in CodeView. We get around that by changinge the type we encode in the debug info to be a reference to the type in the source code. This fixes PR34261. The reland adds two extra checks to the original: It checks if the DbgVariableLocation is valid before checking any of its fields, and it only emits ranges with nonzero registers. Reviewers: aprantl, rnk, zturner Reviewed By: rnk Subscribers: mgorny, llvm-commits, aprantl, hiraditya Differential Revision: https://reviews.llvm.org/D36907 llvm-svn: 312034
2017-08-30 04:59:25 +08:00
; ASM: .cv_def_range .Lfunc_begin3 .Lfunc_end3, "E\021J\001\000\000\000\000\000\000"
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; ASM: .short 4414 # Record kind: S_LOCAL
; ASM: .asciz "p"
; ASM: .cv_def_range [[p_start]] .Lfunc_end3, "C\021\021\000\000\000\004\000\000\000"
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ-LABEL: {{.*}}Proc{{.*}}Sym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: Kind: S_GPROC32_ID (0x1147)
; OBJ: DisplayName: nested
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: LocalSym {
Reland r311957 [codeview] support more DW_OPs for more complete debug info Summary: Some variables show up in Visual Studio as "optimized out" even in -O0 -Od builds. This change fixes two issues that would cause this to happen. The first issue is that not all DIExpressions we generate were recognized by the CodeView writer. This has been addressed by adding support for DW_OP_constu, DW_OP_minus, and DW_OP_plus. The second issue is that we had no way to encode DW_OP_deref in CodeView. We get around that by changinge the type we encode in the debug info to be a reference to the type in the source code. This fixes PR34261. The reland adds two extra checks to the original: It checks if the DbgVariableLocation is valid before checking any of its fields, and it only emits ranges with nonzero registers. Reviewers: aprantl, rnk, zturner Reviewed By: rnk Subscribers: mgorny, llvm-commits, aprantl, hiraditya Differential Revision: https://reviews.llvm.org/D36907 llvm-svn: 312034
2017-08-30 04:59:25 +08:00
; OBJ: Type: Nested&
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: VarName: o
; OBJ: }
Reland r311957 [codeview] support more DW_OPs for more complete debug info Summary: Some variables show up in Visual Studio as "optimized out" even in -O0 -Od builds. This change fixes two issues that would cause this to happen. The first issue is that not all DIExpressions we generate were recognized by the CodeView writer. This has been addressed by adding support for DW_OP_constu, DW_OP_minus, and DW_OP_plus. The second issue is that we had no way to encode DW_OP_deref in CodeView. We get around that by changinge the type we encode in the debug info to be a reference to the type in the source code. This fixes PR34261. The reland adds two extra checks to the original: It checks if the DbgVariableLocation is valid before checking any of its fields, and it only emits ranges with nonzero registers. Reviewers: aprantl, rnk, zturner Reviewed By: rnk Subscribers: mgorny, llvm-commits, aprantl, hiraditya Differential Revision: https://reviews.llvm.org/D36907 llvm-svn: 312034
2017-08-30 04:59:25 +08:00
; OBJ: DefRangeRegisterRelSym {
[CodeView] Add prefix to CodeView registers. Adds CVReg to CodeView register names to prevent a duplicate symbol with CR3 defined in termios.h, as suggested by Zachary on the mailing list. http://lists.llvm.org/pipermail/llvm-dev/2018-May/123372.html Differential revision: https://reviews.llvm.org/D47478 rdar://39863705 llvm-svn: 333421
2018-05-29 22:35:34 +08:00
; OBJ: BaseRegister: CVRegRCX (0x14A)
Reland r311957 [codeview] support more DW_OPs for more complete debug info Summary: Some variables show up in Visual Studio as "optimized out" even in -O0 -Od builds. This change fixes two issues that would cause this to happen. The first issue is that not all DIExpressions we generate were recognized by the CodeView writer. This has been addressed by adding support for DW_OP_constu, DW_OP_minus, and DW_OP_plus. The second issue is that we had no way to encode DW_OP_deref in CodeView. We get around that by changinge the type we encode in the debug info to be a reference to the type in the source code. This fixes PR34261. The reland adds two extra checks to the original: It checks if the DbgVariableLocation is valid before checking any of its fields, and it only emits ranges with nonzero registers. Reviewers: aprantl, rnk, zturner Reviewed By: rnk Subscribers: mgorny, llvm-commits, aprantl, hiraditya Differential Revision: https://reviews.llvm.org/D36907 llvm-svn: 312034
2017-08-30 04:59:25 +08:00
; OBJ: HasSpilledUDTMember: No
; OBJ: OffsetInParent: 0
; OBJ: BasePointerOffset: 0
; OBJ: LocalVariableAddrRange {
; OBJ: }
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: LocalSym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: VarName: p
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: DefRangeSubfieldRegisterSym {
[CodeView] Add prefix to CodeView registers. Adds CVReg to CodeView register names to prevent a duplicate symbol with CR3 defined in termios.h, as suggested by Zachary on the mailing list. http://lists.llvm.org/pipermail/llvm-dev/2018-May/123372.html Differential revision: https://reviews.llvm.org/D47478 rdar://39863705 llvm-svn: 333421
2018-05-29 22:35:34 +08:00
; OBJ: Register: CVRegEAX (0x11)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: MayHaveNoName: 0
; OBJ: OffsetInParent: 4
; OBJ: LocalVariableAddrRange {
; OBJ: }
; OBJ: }
; OBJ: ProcEnd {
; OBJ: }
; ASM-LABEL: .short 4423 # Record kind: S_GPROC32_ID
; ASM: .asciz "bitpiece_spill" # Function name
; ASM: .short 4414 # Record kind: S_LOCAL
; ASM: .asciz "o"
; ASM: .cv_def_range [[spill_o_x_start]] [[spill_o_x_end]], "E\021O\001A\000$\000\000\000"
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ-LABEL: {{.*}}Proc{{.*}}Sym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: Kind: S_GPROC32_ID (0x1147)
; OBJ: DisplayName: bitpiece_spill
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: LocalSym {
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: VarName: o
; OBJ: }
[codeview] Change readobj symbol dumping format Avoid duplicating DictScope with hand-written names everywhere. Print the S_-prefixed symbol kind for every record. This should make it easier to search for certain kinds of records when debugging PDB linking. llvm-svn: 307732
2017-07-12 07:41:41 +08:00
; OBJ: DefRangeRegisterRelSym {
[CodeView] Add prefix to CodeView registers. Adds CVReg to CodeView register names to prevent a duplicate symbol with CR3 defined in termios.h, as suggested by Zachary on the mailing list. http://lists.llvm.org/pipermail/llvm-dev/2018-May/123372.html Differential revision: https://reviews.llvm.org/D47478 rdar://39863705 llvm-svn: 333421
2018-05-29 22:35:34 +08:00
; OBJ: BaseRegister: CVRegRSP (0x14F)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
; OBJ: HasSpilledUDTMember: Yes
; OBJ: OffsetInParent: 4
; OBJ: BasePointerOffset: 36
; OBJ: LocalVariableAddrRange {
; OBJ: }
; OBJ: }
; OBJ: ProcEnd {
; OBJ: }
; ModuleID = 't.c'
source_filename = "t.c"
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc19.0.24210"
%struct.IntPair = type { i32, i32 }
%struct.PadRight = type { i32, i32 }
%struct.PadLeft = type { i32, i32 }
%struct.Nested = type { [2 x %struct.PadLeft] }
@i = external local_unnamed_addr global i32, align 4
@n = external local_unnamed_addr global i32, align 4
; Function Attrs: nounwind uwtable
define i32 @loop_csr() local_unnamed_addr #0 !dbg !7 {
entry:
tail call void @llvm.dbg.declare(metadata %struct.IntPair* undef, metadata !12, metadata !17), !dbg !18
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !19), !dbg !18
tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !20), !dbg !18
tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !19), !dbg !18
tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !20), !dbg !18
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
store i32 0, i32* @i, align 4, !dbg !21, !tbaa !24
%0 = load i32, i32* @n, align 4, !dbg !28, !tbaa !24
%cmp9 = icmp sgt i32 %0, 0, !dbg !29
br i1 %cmp9, label %for.body, label %for.end, !dbg !30
for.body: ; preds = %entry, %for.body
%o.sroa.0.011 = phi i32 [ %call, %for.body ], [ 0, %entry ]
%o.sroa.5.010 = phi i32 [ %call2, %for.body ], [ 0, %entry ]
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.011, metadata !12, metadata !19), !dbg !18
tail call void @llvm.dbg.value(metadata i32 %o.sroa.5.010, metadata !12, metadata !20), !dbg !18
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
%call = tail call i32 @g(i32 %o.sroa.0.011) #5, !dbg !31
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
tail call void @llvm.dbg.value(metadata i32 %call, metadata !12, metadata !19), !dbg !18
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
%call2 = tail call i32 @g(i32 %o.sroa.5.010) #5, !dbg !33
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
tail call void @llvm.dbg.value(metadata i32 %call2, metadata !12, metadata !20), !dbg !18
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
%1 = load i32, i32* @i, align 4, !dbg !21, !tbaa !24
%inc = add nsw i32 %1, 1, !dbg !21
store i32 %inc, i32* @i, align 4, !dbg !21, !tbaa !24
%2 = load i32, i32* @n, align 4, !dbg !28, !tbaa !24
%cmp = icmp slt i32 %inc, %2, !dbg !29
br i1 %cmp, label %for.body, label %for.end, !dbg !30, !llvm.loop !34
for.end: ; preds = %for.body, %entry
%o.sroa.5.0.lcssa = phi i32 [ 0, %entry ], [ %call2, %for.body ]
%o.sroa.0.0.lcssa = phi i32 [ 0, %entry ], [ %call, %for.body ]
%add = add nsw i32 %o.sroa.0.0.lcssa, %o.sroa.5.0.lcssa, !dbg !36
ret i32 %add, !dbg !37
}
; Function Attrs: nounwind readnone
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare i32 @g(i32) local_unnamed_addr #2
; Function Attrs: nounwind readnone uwtable
define i32 @pad_right(i64 %o.coerce) local_unnamed_addr #3 !dbg !38 {
entry:
%o.sroa.1.0.extract.shift = lshr i64 %o.coerce, 32
%o.sroa.1.0.extract.trunc = trunc i64 %o.sroa.1.0.extract.shift to i32
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
tail call void @llvm.dbg.value(metadata i32 %o.sroa.1.0.extract.trunc, metadata !47, metadata !20), !dbg !48
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
tail call void @llvm.dbg.declare(metadata %struct.PadRight* undef, metadata !47, metadata !17), !dbg !48
ret i32 %o.sroa.1.0.extract.trunc, !dbg !49
}
; Function Attrs: nounwind readnone uwtable
define i32 @pad_left(i64 %o.coerce) local_unnamed_addr #3 !dbg !50 {
entry:
%o.sroa.0.0.extract.trunc = trunc i64 %o.coerce to i32
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.0.extract.trunc, metadata !58, metadata !19), !dbg !59
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
tail call void @llvm.dbg.declare(metadata %struct.PadLeft* undef, metadata !58, metadata !17), !dbg !59
ret i32 %o.sroa.0.0.extract.trunc, !dbg !60
}
; Function Attrs: nounwind readonly uwtable
define i32 @nested(%struct.Nested* nocapture readonly %o) local_unnamed_addr #4 !dbg !61 {
entry:
tail call void @llvm.dbg.declare(metadata %struct.Nested* %o, metadata !71, metadata !73), !dbg !74
tail call void @llvm.dbg.declare(metadata %struct.PadLeft* undef, metadata !72, metadata !17), !dbg !75
%p.sroa.3.0..sroa_idx2 = getelementptr inbounds %struct.Nested, %struct.Nested* %o, i64 0, i32 0, i64 1, i32 1, !dbg !76
%p.sroa.3.0.copyload = load i32, i32* %p.sroa.3.0..sroa_idx2, align 4, !dbg !76
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
tail call void @llvm.dbg.value(metadata i32 %p.sroa.3.0.copyload, metadata !72, metadata !20), !dbg !75
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
ret i32 %p.sroa.3.0.copyload, !dbg !77
}
; Function Attrs: nounwind uwtable
define i32 @bitpiece_spill() local_unnamed_addr #0 !dbg !78 {
entry:
tail call void @llvm.dbg.declare(metadata %struct.IntPair* undef, metadata !80, metadata !17), !dbg !81
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
tail call void @llvm.dbg.value(metadata i32 0, metadata !80, metadata !19), !dbg !81
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
%call = tail call i32 @g(i32 0) #5, !dbg !82
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
tail call void @llvm.dbg.value(metadata i32 %call, metadata !80, metadata !20), !dbg !81
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #5, !dbg !83, !srcloc !84
ret i32 %call, !dbg !85
}
; Function Attrs: nounwind readnone
Remove the obsolete offset parameter from @llvm.dbg.value There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
2017-07-29 04:21:02 +08:00
declare void @llvm.dbg.value(metadata, metadata, metadata) #1
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
attributes #2 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #3 = { nounwind readnone uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #4 = { nounwind readonly uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #5 = { nounwind }
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5}
!llvm.ident = !{!6}
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 4.0.0 (trunk 283332) (llvm/trunk 283355)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
!1 = !DIFile(filename: "t.c", directory: "C:\5Csrc\5Cllvm\5Cbuild")
!2 = !{}
!3 = !{i32 2, !"CodeView", i32 1}
!4 = !{i32 2, !"Debug Info Version", i32 3}
!5 = !{i32 1, !"PIC Level", i32 2}
!6 = !{!"clang version 4.0.0 (trunk 283332) (llvm/trunk 283355)"}
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. In order to set breakpoints on labels and list source code around labels, we need collect debug information for labels, i.e., label name, the function label belong, line number in the file, and the address label located. In order to keep these information in LLVM IR and to allow backend to generate debug information correctly. We create a new kind of metadata for labels, DILabel. The format of DILabel is !DILabel(scope: !1, name: "foo", file: !2, line: 3) We hope to keep debug information as much as possible even the code is optimized. So, we create a new kind of intrinsic for label metadata to avoid the metadata is eliminated with basic block. The intrinsic will keep existing if we keep it from optimized out. The format of the intrinsic is llvm.dbg.label(metadata !1) It has only one argument, that is the DILabel metadata. The intrinsic will follow the label immediately. Backend could get the label metadata through the intrinsic's parameter. We also create DIBuilder API for labels to be used by Frontend. Frontend could use createLabel() to allocate DILabel objects, and use insertLabel() to insert llvm.dbg.label intrinsic in LLVM IR. Differential Revision: https://reviews.llvm.org/D45024 Patch by Hsiangkai Wang. llvm-svn: 331841
2018-05-09 10:40:45 +08:00
!7 = distinct !DISubprogram(name: "loop_csr", scope: !1, file: !1, line: 10, type: !8, isLocal: false, isDefinition: true, scopeLine: 10, isOptimized: true, unit: !0, retainedNodes: !11)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
!8 = !DISubroutineType(types: !9)
!9 = !{!10}
!10 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
!11 = !{!12}
!12 = !DILocalVariable(name: "o", scope: !7, file: !1, line: 11, type: !13)
!13 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "IntPair", file: !1, line: 1, size: 64, align: 32, elements: !14)
!14 = !{!15, !16}
!15 = !DIDerivedType(tag: DW_TAG_member, name: "x", scope: !13, file: !1, line: 1, baseType: !10, size: 32, align: 32)
!16 = !DIDerivedType(tag: DW_TAG_member, name: "y", scope: !13, file: !1, line: 1, baseType: !10, size: 32, align: 32, offset: 32)
!17 = !DIExpression()
!18 = !DILocation(line: 11, column: 18, scope: !7)
[DIExpression] Introduce a dedicated DW_OP_LLVM_fragment operation so we can stop using DW_OP_bit_piece with the wrong semantics. The entire back story can be found here: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20161114/405934.html The gist is that in LLVM we've been misinterpreting DW_OP_bit_piece's offset field to mean the offset into the source variable rather than the offset into the location at the top the DWARF expression stack. In order to be able to fix this in a subsequent patch, this patch introduces a dedicated DW_OP_LLVM_fragment operation with the semantics that we used to apply to DW_OP_bit_piece, which is what we actually need while inside of LLVM. This patch is complete with a bitcode upgrade for expressions using the old format. It does not yet fix the DWARF backend to use DW_OP_bit_piece correctly. Implementation note: We discussed several options for implementing this, including reserving a dedicated field in DIExpression for the fragment size and offset, but using an custom operator at the end of the expression works just fine and is more efficient because we then only pay for it when we need it. Differential Revision: https://reviews.llvm.org/D27361 rdar://problem/29335809 llvm-svn: 288683
2016-12-06 02:04:47 +08:00
!19 = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
!20 = !DIExpression(DW_OP_LLVM_fragment, 32, 32)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
!21 = !DILocation(line: 12, column: 23, scope: !22)
!22 = distinct !DILexicalBlock(scope: !23, file: !1, line: 12, column: 3)
!23 = distinct !DILexicalBlock(scope: !7, file: !1, line: 12, column: 3)
!24 = !{!25, !25, i64 0}
!25 = !{!"int", !26, i64 0}
!26 = !{!"omnipotent char", !27, i64 0}
!27 = !{!"Simple C/C++ TBAA"}
!28 = !DILocation(line: 12, column: 19, scope: !22)
!29 = !DILocation(line: 12, column: 17, scope: !22)
!30 = !DILocation(line: 12, column: 3, scope: !23)
!31 = !DILocation(line: 13, column: 11, scope: !32)
!32 = distinct !DILexicalBlock(scope: !22, file: !1, line: 12, column: 27)
!33 = !DILocation(line: 14, column: 11, scope: !32)
!34 = distinct !{!34, !35}
!35 = !DILocation(line: 12, column: 3, scope: !7)
!36 = !DILocation(line: 16, column: 14, scope: !7)
!37 = !DILocation(line: 16, column: 3, scope: !7)
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. In order to set breakpoints on labels and list source code around labels, we need collect debug information for labels, i.e., label name, the function label belong, line number in the file, and the address label located. In order to keep these information in LLVM IR and to allow backend to generate debug information correctly. We create a new kind of metadata for labels, DILabel. The format of DILabel is !DILabel(scope: !1, name: "foo", file: !2, line: 3) We hope to keep debug information as much as possible even the code is optimized. So, we create a new kind of intrinsic for label metadata to avoid the metadata is eliminated with basic block. The intrinsic will keep existing if we keep it from optimized out. The format of the intrinsic is llvm.dbg.label(metadata !1) It has only one argument, that is the DILabel metadata. The intrinsic will follow the label immediately. Backend could get the label metadata through the intrinsic's parameter. We also create DIBuilder API for labels to be used by Frontend. Frontend could use createLabel() to allocate DILabel objects, and use insertLabel() to insert llvm.dbg.label intrinsic in LLVM IR. Differential Revision: https://reviews.llvm.org/D45024 Patch by Hsiangkai Wang. llvm-svn: 331841
2018-05-09 10:40:45 +08:00
!38 = distinct !DISubprogram(name: "pad_right", scope: !1, file: !1, line: 19, type: !39, isLocal: false, isDefinition: true, scopeLine: 19, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !46)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
!39 = !DISubroutineType(types: !40)
!40 = !{!10, !41}
!41 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "PadRight", file: !1, line: 2, size: 64, align: 32, elements: !42)
!42 = !{!43, !45}
!43 = !DIDerivedType(tag: DW_TAG_member, name: "a", scope: !41, file: !1, line: 2, baseType: !44, size: 32, align: 32)
!44 = !DIBasicType(name: "long int", size: 32, align: 32, encoding: DW_ATE_signed)
!45 = !DIDerivedType(tag: DW_TAG_member, name: "b", scope: !41, file: !1, line: 2, baseType: !10, size: 32, align: 32, offset: 32)
!46 = !{!47}
!47 = !DILocalVariable(name: "o", arg: 1, scope: !38, file: !1, line: 19, type: !41)
!48 = !DILocation(line: 19, column: 31, scope: !38)
!49 = !DILocation(line: 20, column: 3, scope: !38)
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. In order to set breakpoints on labels and list source code around labels, we need collect debug information for labels, i.e., label name, the function label belong, line number in the file, and the address label located. In order to keep these information in LLVM IR and to allow backend to generate debug information correctly. We create a new kind of metadata for labels, DILabel. The format of DILabel is !DILabel(scope: !1, name: "foo", file: !2, line: 3) We hope to keep debug information as much as possible even the code is optimized. So, we create a new kind of intrinsic for label metadata to avoid the metadata is eliminated with basic block. The intrinsic will keep existing if we keep it from optimized out. The format of the intrinsic is llvm.dbg.label(metadata !1) It has only one argument, that is the DILabel metadata. The intrinsic will follow the label immediately. Backend could get the label metadata through the intrinsic's parameter. We also create DIBuilder API for labels to be used by Frontend. Frontend could use createLabel() to allocate DILabel objects, and use insertLabel() to insert llvm.dbg.label intrinsic in LLVM IR. Differential Revision: https://reviews.llvm.org/D45024 Patch by Hsiangkai Wang. llvm-svn: 331841
2018-05-09 10:40:45 +08:00
!50 = distinct !DISubprogram(name: "pad_left", scope: !1, file: !1, line: 23, type: !51, isLocal: false, isDefinition: true, scopeLine: 23, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !57)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
!51 = !DISubroutineType(types: !52)
!52 = !{!10, !53}
!53 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "PadLeft", file: !1, line: 3, size: 64, align: 32, elements: !54)
!54 = !{!55, !56}
!55 = !DIDerivedType(tag: DW_TAG_member, name: "a", scope: !53, file: !1, line: 3, baseType: !10, size: 32, align: 32)
!56 = !DIDerivedType(tag: DW_TAG_member, name: "b", scope: !53, file: !1, line: 3, baseType: !44, size: 32, align: 32, offset: 32)
!57 = !{!58}
!58 = !DILocalVariable(name: "o", arg: 1, scope: !50, file: !1, line: 23, type: !53)
!59 = !DILocation(line: 23, column: 29, scope: !50)
!60 = !DILocation(line: 24, column: 3, scope: !50)
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. In order to set breakpoints on labels and list source code around labels, we need collect debug information for labels, i.e., label name, the function label belong, line number in the file, and the address label located. In order to keep these information in LLVM IR and to allow backend to generate debug information correctly. We create a new kind of metadata for labels, DILabel. The format of DILabel is !DILabel(scope: !1, name: "foo", file: !2, line: 3) We hope to keep debug information as much as possible even the code is optimized. So, we create a new kind of intrinsic for label metadata to avoid the metadata is eliminated with basic block. The intrinsic will keep existing if we keep it from optimized out. The format of the intrinsic is llvm.dbg.label(metadata !1) It has only one argument, that is the DILabel metadata. The intrinsic will follow the label immediately. Backend could get the label metadata through the intrinsic's parameter. We also create DIBuilder API for labels to be used by Frontend. Frontend could use createLabel() to allocate DILabel objects, and use insertLabel() to insert llvm.dbg.label intrinsic in LLVM IR. Differential Revision: https://reviews.llvm.org/D45024 Patch by Hsiangkai Wang. llvm-svn: 331841
2018-05-09 10:40:45 +08:00
!61 = distinct !DISubprogram(name: "nested", scope: !1, file: !1, line: 27, type: !62, isLocal: false, isDefinition: true, scopeLine: 27, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !70)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
!62 = !DISubroutineType(types: !63)
!63 = !{!10, !64}
!64 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "Nested", file: !1, line: 4, size: 128, align: 32, elements: !65)
!65 = !{!66}
!66 = !DIDerivedType(tag: DW_TAG_member, name: "a", scope: !64, file: !1, line: 4, baseType: !67, size: 128, align: 32)
!67 = !DICompositeType(tag: DW_TAG_array_type, baseType: !53, size: 128, align: 32, elements: !68)
!68 = !{!69}
!69 = !DISubrange(count: 2)
!70 = !{!71, !72}
!71 = !DILocalVariable(name: "o", arg: 1, scope: !61, file: !1, line: 27, type: !64)
!72 = !DILocalVariable(name: "p", scope: !61, file: !1, line: 28, type: !53)
!73 = !DIExpression(DW_OP_deref)
!74 = !DILocation(line: 27, column: 26, scope: !61)
!75 = !DILocation(line: 28, column: 18, scope: !61)
!76 = !DILocation(line: 28, column: 22, scope: !61)
!77 = !DILocation(line: 29, column: 3, scope: !61)
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. In order to set breakpoints on labels and list source code around labels, we need collect debug information for labels, i.e., label name, the function label belong, line number in the file, and the address label located. In order to keep these information in LLVM IR and to allow backend to generate debug information correctly. We create a new kind of metadata for labels, DILabel. The format of DILabel is !DILabel(scope: !1, name: "foo", file: !2, line: 3) We hope to keep debug information as much as possible even the code is optimized. So, we create a new kind of intrinsic for label metadata to avoid the metadata is eliminated with basic block. The intrinsic will keep existing if we keep it from optimized out. The format of the intrinsic is llvm.dbg.label(metadata !1) It has only one argument, that is the DILabel metadata. The intrinsic will follow the label immediately. Backend could get the label metadata through the intrinsic's parameter. We also create DIBuilder API for labels to be used by Frontend. Frontend could use createLabel() to allocate DILabel objects, and use insertLabel() to insert llvm.dbg.label intrinsic in LLVM IR. Differential Revision: https://reviews.llvm.org/D45024 Patch by Hsiangkai Wang. llvm-svn: 331841
2018-05-09 10:40:45 +08:00
!78 = distinct !DISubprogram(name: "bitpiece_spill", scope: !1, file: !1, line: 32, type: !8, isLocal: false, isDefinition: true, scopeLine: 32, isOptimized: true, unit: !0, retainedNodes: !79)
[codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records This allows LLVM to describe locations of aggregate variables that have been split by SROA. Fixes PR29141 Reviewers: amccarth, majnemer Differential Revision: https://reviews.llvm.org/D25253 llvm-svn: 283388
2016-10-06 05:21:33 +08:00
!79 = !{!80}
!80 = !DILocalVariable(name: "o", scope: !78, file: !1, line: 33, type: !13)
!81 = !DILocation(line: 33, column: 18, scope: !78)
!82 = !DILocation(line: 33, column: 26, scope: !78)
!83 = !DILocation(line: 35, column: 3, scope: !78)
!84 = !{i32 603}
!85 = !DILocation(line: 37, column: 3, scope: !78)