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llvm-project/llvm/docs/AMDGPU/gfx9_bimm32.rst

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[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-18 01:38:11 +08:00
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.. _amdgpu_synid9_bimm32:
imm32
===========================
[AMDGPU][MC][DOC] Updated AMD GPU assembler description. Summary of changes: - Updated to reflect recent changes in assembler; - Minor bugfixing and improvements. llvm-svn: 372857
2019-09-25 20:38:35 +08:00
An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value is truncated to 32 bits.
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-18 01:38:11 +08:00