forked from OSchip/llvm-project
98 lines
3.7 KiB
LLVM
98 lines
3.7 KiB
LLVM
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; RUN: opt < %s -msan -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le--linux"
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define i32 @foo(i32 %guard, ...) {
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%vl = alloca i8*, align 8
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%1 = bitcast i8** %vl to i8*
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call void @llvm.lifetime.start(i64 32, i8* %1)
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call void @llvm.va_start(i8* %1)
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call void @llvm.va_end(i8* %1)
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call void @llvm.lifetime.end(i64 32, i8* %1)
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ret i32 0
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}
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; First, check allocation of the save area.
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; CHECK-LABEL: @foo
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; CHECK: [[A:%.*]] = load {{.*}} @__msan_va_arg_overflow_size_tls
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; CHECK: [[B:%.*]] = add i64 0, [[A]]
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; CHECK: [[C:%.*]] = alloca {{.*}} [[B]]
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; CHECK: [[STACK:%.*]] = bitcast {{.*}} @__msan_va_arg_tls to i8*
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; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[C]], i8* [[STACK]], i64 [[B]], i32 8, i1 false)
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declare void @llvm.lifetime.start(i64, i8* nocapture) #1
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declare void @llvm.va_start(i8*) #2
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declare void @llvm.va_end(i8*) #2
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declare void @llvm.lifetime.end(i64, i8* nocapture) #1
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define i32 @bar() {
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%1 = call i32 (i32, ...) @foo(i32 0, i32 1, i64 2, double 3.000000e+00)
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ret i32 %1
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}
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; Save the incoming shadow value from the arguments in the __msan_va_arg_tls
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; array.
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; CHECK-LABEL: @bar
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; CHECK: store i32 0, i32* bitcast ([100 x i64]* @__msan_va_arg_tls to i32*), align 8
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; CHECK: store i64 0, i64* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to i64*), align 8
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; CHECK: store i64 0, i64* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 16) to i64*), align 8
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; CHECK: store {{.*}} 24, {{.*}} @__msan_va_arg_overflow_size_tls
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; Check vector argument.
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define i32 @bar2() {
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%1 = call i32 (i32, ...) @foo(i32 0, <2 x i64> <i64 1, i64 2>)
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ret i32 %1
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}
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; The vector is at offset 16 of parameter save area, but __msan_va_arg_tls
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; corresponds to offset 8+ of parameter save area - so the offset from
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; __msan_va_arg_tls is actually misaligned.
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; CHECK-LABEL: @bar2
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; CHECK: store <2 x i64> zeroinitializer, <2 x i64>* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to <2 x i64>*), align 8
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; CHECK: store {{.*}} 24, {{.*}} @__msan_va_arg_overflow_size_tls
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; Check i64 array.
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define i32 @bar4() {
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%1 = call i32 (i32, ...) @foo(i32 0, [2 x i64] [i64 1, i64 2])
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ret i32 %1
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}
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; CHECK-LABEL: @bar4
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; CHECK: store [2 x i64] zeroinitializer, [2 x i64]* bitcast ([100 x i64]* @__msan_va_arg_tls to [2 x i64]*), align 8
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; CHECK: store {{.*}} 16, {{.*}} @__msan_va_arg_overflow_size_tls
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; Check i128 array.
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define i32 @bar5() {
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%1 = call i32 (i32, ...) @foo(i32 0, [2 x i128] [i128 1, i128 2])
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ret i32 %1
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}
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; CHECK-LABEL: @bar5
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; CHECK: store [2 x i128] zeroinitializer, [2 x i128]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to [2 x i128]*), align 8
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; CHECK: store {{.*}} 40, {{.*}} @__msan_va_arg_overflow_size_tls
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; Check 8-aligned byval.
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define i32 @bar6([2 x i64]* %arg) {
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%1 = call i32 (i32, ...) @foo(i32 0, [2 x i64]* byval align 8 %arg)
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ret i32 %1
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}
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; CHECK-LABEL: @bar6
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; CHECK: [[SHADOW:%[0-9]+]] = bitcast [2 x i64]* bitcast ([100 x i64]* @__msan_va_arg_tls to [2 x i64]*) to i8*
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; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[SHADOW]], i8* {{.*}}, i64 16, i32 8, i1 false)
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; CHECK: store {{.*}} 16, {{.*}} @__msan_va_arg_overflow_size_tls
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; Check 16-aligned byval.
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define i32 @bar7([4 x i64]* %arg) {
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%1 = call i32 (i32, ...) @foo(i32 0, [4 x i64]* byval align 16 %arg)
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ret i32 %1
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}
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; CHECK-LABEL: @bar7
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; CHECK: [[SHADOW:%[0-9]+]] = bitcast [4 x i64]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to [4 x i64]*)
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; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[SHADOW]], i8* {{.*}}, i64 32, i32 8, i1 false)
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; CHECK: store {{.*}} 40, {{.*}} @__msan_va_arg_overflow_size_tls
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