forked from OSchip/llvm-project
52 lines
1.5 KiB
LLVM
52 lines
1.5 KiB
LLVM
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; Test that DAGCombiner gets helped by computeKnownBitsForTargetNode().
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;
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; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s
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; SystemZISD::REPLICATE
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define i32 @f0() {
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; CHECK-LABEL: f0:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vlgvf
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; CHECK-NOT: lhi %r2, 0
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; CHECK-NOT: chi %r0, 0
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; CHECK-NOT: lochilh %r2, 1
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; CHECK: br %r14
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%cmp0 = icmp ne <4 x i32> undef, zeroinitializer
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%zxt0 = zext <4 x i1> %cmp0 to <4 x i32>
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%ext0 = extractelement <4 x i32> %zxt0, i32 3
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br label %exit
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exit:
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; The vector icmp+zext involves a REPLICATE of 1's. If KnownBits reflects
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; this, DAGCombiner can see that the i32 icmp and zext here are not needed.
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%cmp1 = icmp ne i32 %ext0, 0
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%zxt1 = zext i1 %cmp1 to i32
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ret i32 %zxt1
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}
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; SystemZISD::JOIN_DWORDS (and REPLICATE)
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define void @f1() {
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; The DAG XOR has JOIN_DWORDS and REPLICATE operands. With KnownBits properly set
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; for both these nodes, ICMP is used instead of TM during lowering because
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; adjustForRedundantAnd() succeeds.
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; CHECK-LABEL: f1:
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; CHECK-LABEL: # %bb.0:
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; CHECK-NOT: tmll
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; CHECK-NOT: jne
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; CHECK: cijlh
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%1 = load i16, i16* null, align 2
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%2 = icmp eq i16 %1, 0
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%3 = insertelement <2 x i1> undef, i1 %2, i32 0
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%4 = insertelement <2 x i1> %3, i1 true, i32 1
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%5 = xor <2 x i1> %4, <i1 true, i1 true>
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%6 = extractelement <2 x i1> %5, i32 0
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%7 = or i1 %6, undef
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br i1 %7, label %9, label %8
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; <label>:8: ; preds = %0
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unreachable
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; <label>:9: ; preds = %0
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unreachable
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}
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