2019-04-17 12:52:47 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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2019-09-09 03:48:47 +08:00
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define i1 @is_rem2_neg_i8(i8 %x) {
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; CHECK-LABEL: @is_rem2_neg_i8(
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2019-09-11 20:04:26 +08:00
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; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -127
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], -127
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: ret i1 [[R]]
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;
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%s = srem i8 %x, 2
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%r = icmp slt i8 %s, 0
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ret i1 %r
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}
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define <2 x i1> @is_rem2_pos_v2i8(<2 x i8> %x) {
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; CHECK-LABEL: @is_rem2_pos_v2i8(
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2019-09-11 20:04:26 +08:00
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; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], <i8 -127, i8 -127>
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; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 1, i8 1>
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: ret <2 x i1> [[R]]
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;
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%s = srem <2 x i8> %x, <i8 2, i8 2>
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%r = icmp sgt <2 x i8> %s, zeroinitializer
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ret <2 x i1> %r
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}
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2019-09-11 20:04:26 +08:00
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; i8 -97 == 159 == 0b10011111
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2019-09-09 03:48:47 +08:00
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define i1 @is_rem32_pos_i8(i8 %x) {
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; CHECK-LABEL: @is_rem32_pos_i8(
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2019-09-11 20:04:26 +08:00
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; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -97
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; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[TMP1]], 0
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: ret i1 [[R]]
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;
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%s = srem i8 %x, 32
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%r = icmp sgt i8 %s, 0
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ret i1 %r
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}
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2019-09-11 20:04:26 +08:00
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; i16 -32765 == 32771 == 0b1000000000000011
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2019-09-09 03:48:47 +08:00
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define i1 @is_rem4_neg_i16(i16 %x) {
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; CHECK-LABEL: @is_rem4_neg_i16(
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2019-09-11 20:04:26 +08:00
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; CHECK-NEXT: [[TMP1:%.*]] = and i16 [[X:%.*]], -32765
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; CHECK-NEXT: [[R:%.*]] = icmp ugt i16 [[TMP1]], -32768
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: ret i1 [[R]]
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;
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%s = srem i16 %x, 4
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%r = icmp slt i16 %s, 0
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ret i1 %r
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}
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declare void @use(i32)
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2019-09-11 20:04:26 +08:00
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; TODO: This is still worth folding because srem is difficult?
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2019-09-09 03:48:47 +08:00
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define i1 @is_rem32_neg_i32_extra_use(i32 %x) {
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; CHECK-LABEL: @is_rem32_neg_i32_extra_use(
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; CHECK-NEXT: [[S:%.*]] = srem i32 [[X:%.*]], 32
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; CHECK-NEXT: call void @use(i32 [[S]])
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; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[S]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%s = srem i32 %x, 32
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call void @use(i32 %s)
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%r = icmp slt i32 %s, 0
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ret i1 %r
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}
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2019-09-11 20:04:26 +08:00
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; Negative test - wrong compare constant
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2019-09-09 03:48:47 +08:00
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define i1 @is_rem8_nonneg_i16(i16 %x) {
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; CHECK-LABEL: @is_rem8_nonneg_i16(
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; CHECK-NEXT: [[S:%.*]] = srem i16 [[X:%.*]], 8
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; CHECK-NEXT: [[R:%.*]] = icmp sgt i16 [[S]], -1
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; CHECK-NEXT: ret i1 [[R]]
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;
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%s = srem i16 %x, 8
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%r = icmp sgt i16 %s, -1
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ret i1 %r
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}
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2019-09-11 20:04:26 +08:00
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; Negative test - wrong remainder constant
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2019-09-09 03:48:47 +08:00
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define i1 @is_rem3_neg_i8(i8 %x) {
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; CHECK-LABEL: @is_rem3_neg_i8(
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; CHECK-NEXT: [[S:%.*]] = srem i8 [[X:%.*]], 3
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; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[S]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%s = srem i8 %x, 3
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%r = icmp slt i8 %s, 0
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ret i1 %r
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}
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2019-09-11 20:04:26 +08:00
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; Negative test - wrong compare constant
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2019-09-09 03:48:47 +08:00
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define i1 @is_rem16_something_i8(i8 %x) {
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; CHECK-LABEL: @is_rem16_something_i8(
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; CHECK-NEXT: [[S:%.*]] = srem i8 [[X:%.*]], 16
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; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[S]], 7
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; CHECK-NEXT: ret i1 [[R]]
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;
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%s = srem i8 %x, 16
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%r = icmp slt i8 %s, 7
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ret i1 %r
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}
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2019-04-17 12:52:47 +08:00
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; PR30281 - https://llvm.org/bugs/show_bug.cgi?id=30281
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; All of these tests contain foldable division-by-constant instructions, but we
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; can't assert that those folds have occurred before we process the later icmp.
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define i32 @icmp_div(i16 %a, i16 %c) {
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; CHECK-LABEL: @icmp_div(
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; CHECK-NEXT: entry:
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[A:%.*]], 0
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[THEN:%.*]], label [[EXIT:%.*]]
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2019-04-17 12:52:47 +08:00
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; CHECK: then:
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[C:%.*]], 0
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; CHECK-NEXT: [[PHITMP1:%.*]] = sext i1 [[CMP]] to i32
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; CHECK-NEXT: br label [[EXIT]]
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2019-04-17 12:52:47 +08:00
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; CHECK: exit:
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[PHITMP1]], [[THEN]] ]
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2019-04-17 12:52:47 +08:00
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; CHECK-NEXT: ret i32 [[PHI]]
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;
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entry:
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%tobool = icmp eq i16 %a, 0
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br i1 %tobool, label %then, label %exit
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then:
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%div = sdiv i16 %c, -1
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%cmp = icmp ne i16 %div, 0
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br label %exit
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exit:
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%phi = phi i1 [ false, %entry ], [ %cmp, %then ]
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%zext = zext i1 %phi to i32
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%add = add nsw i32 %zext, -1
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ret i32 %add
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}
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define i32 @icmp_div2(i16 %a, i16 %c) {
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; CHECK-LABEL: @icmp_div2(
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; CHECK-NEXT: entry:
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[A:%.*]], 0
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[THEN:%.*]], label [[EXIT:%.*]]
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2019-04-17 12:52:47 +08:00
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; CHECK: then:
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: br label [[EXIT]]
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2019-04-17 12:52:47 +08:00
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; CHECK: exit:
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ 0, [[THEN]] ]
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2019-04-17 12:52:47 +08:00
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; CHECK-NEXT: ret i32 [[PHI]]
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;
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entry:
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%tobool = icmp eq i16 %a, 0
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br i1 %tobool, label %then, label %exit
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then:
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%div = sdiv i16 %c, 0
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%cmp = icmp ne i16 %div, 0
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br label %exit
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exit:
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%phi = phi i1 [ false, %entry ], [ %cmp, %then ]
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%zext = zext i1 %phi to i32
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%add = add nsw i32 %zext, -1
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ret i32 %add
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}
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define i32 @icmp_div3(i16 %a, i16 %c) {
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; CHECK-LABEL: @icmp_div3(
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; CHECK-NEXT: entry:
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[A:%.*]], 0
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[THEN:%.*]], label [[EXIT:%.*]]
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2019-04-17 12:52:47 +08:00
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; CHECK: then:
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[C:%.*]], 0
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; CHECK-NEXT: [[PHITMP1:%.*]] = sext i1 [[CMP]] to i32
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; CHECK-NEXT: br label [[EXIT]]
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2019-04-17 12:52:47 +08:00
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; CHECK: exit:
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2019-09-09 03:48:47 +08:00
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; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[PHITMP1]], [[THEN]] ]
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2019-04-17 12:52:47 +08:00
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; CHECK-NEXT: ret i32 [[PHI]]
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;
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entry:
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%tobool = icmp eq i16 %a, 0
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br i1 %tobool, label %then, label %exit
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then:
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%div = sdiv i16 %c, 1
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%cmp = icmp ne i16 %div, 0
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br label %exit
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exit:
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%phi = phi i1 [ false, %entry ], [ %cmp, %then ]
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%zext = zext i1 %phi to i32
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%add = add nsw i32 %zext, -1
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ret i32 %add
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}
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