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llvm-project/llvm/lib/Target/Mips/MipsTargetStreamer.h

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Add a MCTargetStreamer interface. This patch fixes an old FIXME by creating a MCTargetStreamer interface and moving the target specific functions for ARM, Mips and PPC to it. The ARM streamer is still declared in a common place because it is used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are completely hidden in the corresponding Target directories. I will send an email to llvmdev with instructions on how to use this. llvm-svn: 192181
2013-10-08 21:08:17 +08:00
//===-- MipsTargetStreamer.h - Mips Target Streamer ------------*- C++ -*--===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
Canonicalize header guards into a common format. Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558
2014-08-14 00:26:38 +08:00
#ifndef LLVM_LIB_TARGET_MIPS_MIPSTARGETSTREAMER_H
#define LLVM_LIB_TARGET_MIPS_MIPSTARGETSTREAMER_H
Add a MCTargetStreamer interface. This patch fixes an old FIXME by creating a MCTargetStreamer interface and moving the target specific functions for ARM, Mips and PPC to it. The ARM streamer is still declared in a common place because it is used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are completely hidden in the corresponding Target directories. I will send an email to llvmdev with instructions on how to use this. llvm-svn: 192181
2013-10-08 21:08:17 +08:00
[cleanup] Re-sort all the #include lines in LLVM using utils/sort_includes.py. I clearly haven't done this in a while, so more changed than usual. This even uncovered a missing include from the InstrProf library that I've added. No functionality changed here, just mechanical cleanup of the include order. llvm-svn: 225974
2015-01-14 19:23:27 +08:00
#include "MCTargetDesc/MipsABIFlagsSection.h"
Move the Mips target to storing the ABI in the TargetMachine rather than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. llvm-svn: 227102
2015-01-27 01:33:46 +08:00
#include "MCTargetDesc/MipsABIInfo.h"
[mips] Save a copy of MipsABIInfo in the MipsTargetStreamer to escape a dangling pointer The MipsTargetELFStreamer can receive ABI info from many sources. For example, from the MipsAsmParser instance. Lifetime of the MipsAsmParser can be shorter than MipsTargetELFStreamer's lifetime. In that case we get a dangling pointer to MipsABIInfo. Differential Revision: http://reviews.llvm.org/D12805 llvm-svn: 247546
2015-09-14 19:18:03 +08:00
#include "llvm/ADT/Optional.h"
[Mips] MipsTargetStreamer refactoring. No functionality changes. llvm-svn: 195057
2013-11-19 07:55:27 +08:00
#include "llvm/MC/MCELFStreamer.h"
Re-commit: [mips] Implement .ent, .end, .frame, .mask and .fmask. Patch by Matheus Almeida and Toma Tabacu The lld test failure on the previous attempt to commit was caused by the addition of the .pdr section causing the offsets it was checking to change. This has been fixed by removing the .ent/.end directives from that test since they weren't really needed. llvm-svn: 215535
2014-08-13 18:07:34 +08:00
#include "llvm/MC/MCRegisterInfo.h"
Add a MCTargetStreamer interface. This patch fixes an old FIXME by creating a MCTargetStreamer interface and moving the target specific functions for ARM, Mips and PPC to it. The ARM streamer is still declared in a common place because it is used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are completely hidden in the corresponding Target directories. I will send an email to llvmdev with instructions on how to use this. llvm-svn: 192181
2013-10-08 21:08:17 +08:00
#include "llvm/MC/MCStreamer.h"
namespace llvm {
Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. llvm-svn: 212519
2014-07-08 16:59:22 +08:00
[mips] Fixed struct/class mismatch introduced in r212522. Clang emits a warning about this. llvm-svn: 212528
2014-07-08 21:13:42 +08:00
struct MipsABIFlagsSection;
Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. llvm-svn: 212519
2014-07-08 16:59:22 +08:00
Add a MCTargetStreamer interface. This patch fixes an old FIXME by creating a MCTargetStreamer interface and moving the target specific functions for ARM, Mips and PPC to it. The ARM streamer is still declared in a common place because it is used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are completely hidden in the corresponding Target directories. I will send an email to llvmdev with instructions on how to use this. llvm-svn: 192181
2013-10-08 21:08:17 +08:00
class MipsTargetStreamer : public MCTargetStreamer {
public:
Construct the MCStreamer before constructing the MCTargetStreamer. This has a few advantages: * Only targets that use a MCTargetStreamer have to worry about it. * There is never a MCTargetStreamer without a MCStreamer, so we can use a reference. * A MCTargetStreamer can talk to the MCStreamer in its constructor. llvm-svn: 200129
2014-01-26 14:06:37 +08:00
MipsTargetStreamer(MCStreamer &S);
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
virtual void emitDirectiveSetMicroMips();
virtual void emitDirectiveSetNoMicroMips();
virtual void emitDirectiveSetMips16();
virtual void emitDirectiveSetNoMips16();
Convert some easy uses of EmitRawText to TargetStreamer methods. llvm-svn: 200122
2014-01-26 13:06:48 +08:00
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
virtual void emitDirectiveSetReorder();
virtual void emitDirectiveSetNoReorder();
virtual void emitDirectiveSetMacro();
virtual void emitDirectiveSetNoMacro();
[mips] Add assembler support for .set msa/nomsa directive. Summary: These directives are used to toggle whether the assembler accepts MSA-specific instructions or not. Patch by Matheus Almeida and Toma Tabacu. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4783 llvm-svn: 215099
2014-08-07 20:03:36 +08:00
virtual void emitDirectiveSetMsa();
virtual void emitDirectiveSetNoMsa();
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
virtual void emitDirectiveSetAt();
[mips] Improve support for the .set at/noat assembler directives. Summary: Made the following changes: Added calls to emitDirectiveSetNoAt() and emitDirectiveSetAt(). Added special emit function for .set at=$reg, emitDirectiveSetAtWithArg(unsigned RegNo). Improved parsing error checks for .set at. Refactored parser code for .set at. Improved testing of both directives. Improved code readability and comments. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7176 llvm-svn: 229097
2015-02-13 18:30:57 +08:00
virtual void emitDirectiveSetAtWithArg(unsigned RegNo);
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
virtual void emitDirectiveSetNoAt();
virtual void emitDirectiveEnd(StringRef Name);
Convert some easy uses of EmitRawText to TargetStreamer methods. llvm-svn: 200122
2014-01-26 13:06:48 +08:00
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
virtual void emitDirectiveEnt(const MCSymbol &Symbol);
virtual void emitDirectiveAbiCalls();
virtual void emitDirectiveNaN2008();
virtual void emitDirectiveNaNLegacy();
virtual void emitDirectiveOptionPic0();
virtual void emitDirectiveOptionPic2();
[mips] [IAS] Add support for the .insn directive. Summary: This assembler directive marks the current label as an instruction label in microMIPS and MIPS16. This initial implementation works only for microMIPS. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8006 llvm-svn: 235084
2015-04-16 17:53:47 +08:00
virtual void emitDirectiveInsn();
Print .frame via the target streamer. llvm-svn: 200186
2014-01-27 11:53:56 +08:00
virtual void emitFrame(unsigned StackReg, unsigned StackSize,
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
unsigned ReturnReg);
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff);
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff);
This patch implements .set mips32r2 directive and sets appropriate feature bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file. llvm-svn: 202807
2014-03-04 17:54:09 +08:00
[mips] Add assembler support for .set arch=x directive. Summary: This directive is similar to ".set mipsX". It is used to change the CPU target of the assembler, enabling it to accept instructions for a specific CPU. This patch only implements the r4000 CPU (which is treated internally as generic mips3) and the generic ISAs. Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4884 llvm-svn: 215978
2014-08-19 22:22:52 +08:00
virtual void emitDirectiveSetArch(StringRef Arch);
[mips] Add assembler support for .set mips0 directive. Summary: This directive is used to reset the assembler options to their initial values. Assembly programmers use it in conjunction with the ".set mipsX" directives. This patch depends on the .set push/pop directive (http://reviews.llvm.org/D4821). Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4957 llvm-svn: 217438
2014-09-09 20:52:14 +08:00
virtual void emitDirectiveSetMips0();
[mips] Add assembler support for '.set mipsX'. Summary: This patch also fixes an issue with the way the Mips assembler enables/disables architecture features. Before this patch, the assembler never disabled feature bits. For example, .set mips64 .set mips32r2 would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right. Unfortunately this isn't trivial to fix because there's not an easy way to clear feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits that imply the feature being cleared and not the implied bits by the feature (there's a better explanation to the code I added). Patch by Matheus Almeida and updated by Toma Tabacu Reviewers: vmedic, matheusalmeida, dsanders Reviewed By: dsanders Subscribers: tomatabacu, llvm-commits Differential Revision: http://reviews.llvm.org/D4123 llvm-svn: 214709
2014-08-04 20:20:00 +08:00
virtual void emitDirectiveSetMips1();
virtual void emitDirectiveSetMips2();
virtual void emitDirectiveSetMips3();
virtual void emitDirectiveSetMips4();
virtual void emitDirectiveSetMips5();
virtual void emitDirectiveSetMips32();
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
virtual void emitDirectiveSetMips32R2();
[mips] Add backend support for Mips32r[35] and Mips64r[35]. Summary: These ISA's didn't add any instructions so they are almost identical to Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA revision in .MIPS.abiflags is 3 or 5 respectively instead of 2. Reviewers: vmedic Reviewed By: vmedic Subscribers: tomatabacu, llvm-commits, atanasyan Differential Revision: http://reviews.llvm.org/D7381 llvm-svn: 229695
2015-02-19 00:24:50 +08:00
virtual void emitDirectiveSetMips32R3();
virtual void emitDirectiveSetMips32R5();
[mips] Add assembler support for '.set mipsX'. Summary: This patch also fixes an issue with the way the Mips assembler enables/disables architecture features. Before this patch, the assembler never disabled feature bits. For example, .set mips64 .set mips32r2 would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right. Unfortunately this isn't trivial to fix because there's not an easy way to clear feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits that imply the feature being cleared and not the implied bits by the feature (there's a better explanation to the code I added). Patch by Matheus Almeida and updated by Toma Tabacu Reviewers: vmedic, matheusalmeida, dsanders Reviewed By: dsanders Subscribers: tomatabacu, llvm-commits Differential Revision: http://reviews.llvm.org/D4123 llvm-svn: 214709
2014-08-04 20:20:00 +08:00
virtual void emitDirectiveSetMips32R6();
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
virtual void emitDirectiveSetMips64();
virtual void emitDirectiveSetMips64R2();
[mips] Add backend support for Mips32r[35] and Mips64r[35]. Summary: These ISA's didn't add any instructions so they are almost identical to Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA revision in .MIPS.abiflags is 3 or 5 respectively instead of 2. Reviewers: vmedic Reviewed By: vmedic Subscribers: tomatabacu, llvm-commits, atanasyan Differential Revision: http://reviews.llvm.org/D7381 llvm-svn: 229695
2015-02-19 00:24:50 +08:00
virtual void emitDirectiveSetMips64R3();
virtual void emitDirectiveSetMips64R5();
[mips] Add assembler support for '.set mipsX'. Summary: This patch also fixes an issue with the way the Mips assembler enables/disables architecture features. Before this patch, the assembler never disabled feature bits. For example, .set mips64 .set mips32r2 would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right. Unfortunately this isn't trivial to fix because there's not an easy way to clear feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits that imply the feature being cleared and not the implied bits by the feature (there's a better explanation to the code I added). Patch by Matheus Almeida and updated by Toma Tabacu Reviewers: vmedic, matheusalmeida, dsanders Reviewed By: dsanders Subscribers: tomatabacu, llvm-commits Differential Revision: http://reviews.llvm.org/D4123 llvm-svn: 214709
2014-08-04 20:20:00 +08:00
virtual void emitDirectiveSetMips64R6();
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
virtual void emitDirectiveSetDsp();
[mips] Add assembler support for the .set nodsp directive. Summary: This directive is used to tell the assembler to reject DSP-specific instructions. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D5142 llvm-svn: 217946
2014-09-17 17:01:54 +08:00
virtual void emitDirectiveSetNoDsp();
[mips] Add assembler support for .set push/pop directive. Summary: These directives are used to save the current assembler options (in the case of ".set push") and restore the previously saved options (in the case of ".set pop"). Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4821 llvm-svn: 217432
2014-09-09 18:15:38 +08:00
virtual void emitDirectiveSetPop();
virtual void emitDirectiveSetPush();
[mips] [IAS] Add support for the .set softfloat/hardfloat directives. Summary: These directives are used to set the current value of the SoftFloat feature. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D9074 llvm-svn: 238813
2015-06-02 17:48:04 +08:00
virtual void emitDirectiveSetSoftFloat();
virtual void emitDirectiveSetHardFloat();
[mips] Add support for .cpload. Summary: This directive is used for setting up $gp in the beginning of a function. It expands to three instructions if PIC is enabled: lui $gp, %hi(_gp_disp) addui $gp, $gp, %lo(_gp_disp) addu $gp, $gp, $reg _gp_disp is a special symbol that the linker sets to the distance between the lui instruction and the context pointer (_gp). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3480 llvm-svn: 207637
2014-04-30 19:28:42 +08:00
// PIC support
[mips] Rename emit and parse functions for the .cpload assembler directive. NFC. Summary: It's better if we have a consistent name for .cpload-related functions. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5437 llvm-svn: 218768
2014-10-01 22:53:19 +08:00
virtual void emitDirectiveCpLoad(unsigned RegNo);
[mips] Move expansion of .cpsetup to target streamer. Summary: There are two functional changes: 1) The directive is not expanded for the ASM->ASM code path. 2) If PIC is not set, there's no expansion for the ASM->OBJ code path (same behaviour as GAS). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3482 llvm-svn: 207741
2014-05-01 18:24:46 +08:00
virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
[Mips] Add a target streamer when creating a null streamer. Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
2014-06-24 03:43:40 +08:00
const MCSymbol &Sym, bool IsReg);
[mips] Add support for -modd-spreg/-mno-odd-spreg Summary: When -mno-odd-spreg is in effect, 32-bit floating point values are not permitted in odd FPU registers. The option also prohibits 32-bit and 64-bit floating point comparison results from being written to odd registers. This option has three purposes: * It allows support for certain MIPS implementations such as loongson-3a that do not allow the use of odd registers for single precision arithmetic. * When using -mfpxx, -mno-odd-spreg is the default and this allows us to statically check that code is compliant with the O32 FPXX ABI since mtc1/mfc1 instructions to/from odd registers are guaranteed not to appear for any reason. Once this has been established, the user can then re-enable -modd-spreg to regain the use of all 32 single-precision registers. * When using -mfp64 and -mno-odd-spreg together, an O32 extension named O32 FP64A is used as the ABI. This is intended to provide almost all functionality of an FR=1 processor but can also be executed on a FR=0 core with the assistance of a hardware compatibility mode which emulates FR=0 behaviour on an FR=1 processor. * Added '.module oddspreg' and '.module nooddspreg' each of which update the .MIPS.abiflags section appropriately * Moved setFpABI() call inside emitDirectiveModuleFP() so that the caller doesn't have to remember to do it. * MipsABIFlags now calculates the flags1 and flags2 member on demand rather than trying to maintain them in the same format they will be emitted in. There is one portion of the -mfp64 and -mno-odd-spreg combination that is not implemented yet. Moves to/from odd-numbered double-precision registers must not use mtc1. I will fix this in a follow-up. Differential Revision: http://reviews.llvm.org/D4383 llvm-svn: 212717
2014-07-10 21:38:23 +08:00
[mips] [IAS] Refactor the emitDirectiveModuleFP() functions. NFC. Summary: Simplify emitDirectiveModuleFP() by having it just print the current information from MipsABIFlagsSection and doing an updateABIInfo() before such calls. This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object, and also makes sure we use the update mechanism from MipsABIFlagsSection. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D10642 llvm-svn: 240637
2015-06-25 20:44:38 +08:00
// FP abiflags directives
virtual void emitDirectiveModuleFP();
[mips] [IAS] Refactor the emitDirectiveModuleOddSPReg() functions. NFC. Summary: We can simplify emitDirectiveModuleOddSPReg() by having it print the current OddSPReg information from MipsABIFlagsSection and doing an updateABIInfo() before such calls. This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object, and also makes sure we use the update mechanism from MipsABIFlagsSection. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D10641 llvm-svn: 240630
2015-06-25 18:56:57 +08:00
virtual void emitDirectiveModuleOddSPReg();
[mips] [IAS] Add support for the .module softfloat/hardfloat directives. These directives are used to set the default value of the SoftFloat feature. They have the same effect as setting -m{soft, hard}-float from the command line. Differential Revision: http://reviews.llvm.org/D9073 llvm-svn: 241066
2015-06-30 21:46:03 +08:00
virtual void emitDirectiveModuleSoftFloat();
virtual void emitDirectiveModuleHardFloat();
[mips] [IAS] Add missing constraints and improve testing for the .module directive. Summary: None of the .set directives can be used before the .module directives. The .set mips0/pop/push were not triggering this constraint. Also added testing for all the other implemented directives which are supposed to trigger this constraint. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7140 llvm-svn: 231465
2015-03-06 20:15:12 +08:00
virtual void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value);
[mips] [IAS] Add support for the .set oddspreg/nooddspreg directives. Differential Revision: http://reviews.llvm.org/D10657 llvm-svn: 241052
2015-06-30 17:36:50 +08:00
virtual void emitDirectiveSetOddSPReg();
virtual void emitDirectiveSetNoOddSPReg();
[mips] [IAS] Refactor the emitDirectiveModuleFP() functions. NFC. Summary: Simplify emitDirectiveModuleFP() by having it just print the current information from MipsABIFlagsSection and doing an updateABIInfo() before such calls. This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object, and also makes sure we use the update mechanism from MipsABIFlagsSection. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D10642 llvm-svn: 240637
2015-06-25 20:44:38 +08:00
[mips] Rename [gs]etCanHaveModuleDir to more natural names Summary: getCanHaveModuleDir() is renamed to isModuleDirectiveAllowed(), and setCanHaveModuleDir() is renamed to forbidModuleDirective() since it is only ever given a false argument. Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D4885 llvm-svn: 215628
2014-08-14 17:18:14 +08:00
void forbidModuleDirective() { ModuleDirectiveAllowed = false; }
[mips] [IAS] Add missing constraints and improve testing for the .module directive. Summary: None of the .set directives can be used before the .module directives. The .set mips0/pop/push were not triggering this constraint. Also added testing for all the other implemented directives which are supposed to trigger this constraint. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7140 llvm-svn: 231465
2015-03-06 20:15:12 +08:00
void reallowModuleDirective() { ModuleDirectiveAllowed = true; }
[mips] Rename [gs]etCanHaveModuleDir to more natural names Summary: getCanHaveModuleDir() is renamed to isModuleDirectiveAllowed(), and setCanHaveModuleDir() is renamed to forbidModuleDirective() since it is only ever given a false argument. Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D4885 llvm-svn: 215628
2014-08-14 17:18:14 +08:00
bool isModuleDirectiveAllowed() { return ModuleDirectiveAllowed; }
Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. llvm-svn: 212519
2014-07-08 16:59:22 +08:00
// This method enables template classes to set internal abi flags
// structure values.
template <class PredicateLibrary>
void updateABIInfo(const PredicateLibrary &P) {
[mips] Save a copy of MipsABIInfo in the MipsTargetStreamer to escape a dangling pointer The MipsTargetELFStreamer can receive ABI info from many sources. For example, from the MipsAsmParser instance. Lifetime of the MipsAsmParser can be shorter than MipsTargetELFStreamer's lifetime. In that case we get a dangling pointer to MipsABIInfo. Differential Revision: http://reviews.llvm.org/D12805 llvm-svn: 247546
2015-09-14 19:18:03 +08:00
ABI = P.getABI();
[mips] Improve encapsulation of the .MIPS.abiflags implementation and limit scope of related enums Summary: Follow on to r212519 to improve the encapsulation and limit the scope of the enums. Also merged two very similar parser functions, fixed a bug where ASE's were not being reported, and marked CPR1's as being 128-bit when MSA is enabled. Differential Revision: http://reviews.llvm.org/D4384 llvm-svn: 212522
2014-07-08 18:11:38 +08:00
ABIFlagsSection.setAllFromPredicates(P);
Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. llvm-svn: 212519
2014-07-08 16:59:22 +08:00
}
[mips] Improve encapsulation of the .MIPS.abiflags implementation and limit scope of related enums Summary: Follow on to r212519 to improve the encapsulation and limit the scope of the enums. Also merged two very similar parser functions, fixed a bug where ASE's were not being reported, and marked CPR1's as being 128-bit when MSA is enabled. Differential Revision: http://reviews.llvm.org/D4384 llvm-svn: 212522
2014-07-08 18:11:38 +08:00
MipsABIFlagsSection &getABIFlagsSection() { return ABIFlagsSection; }
Move the Mips target to storing the ABI in the TargetMachine rather than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. llvm-svn: 227102
2015-01-27 01:33:46 +08:00
const MipsABIInfo &getABI() const {
[mips] Save a copy of MipsABIInfo in the MipsTargetStreamer to escape a dangling pointer The MipsTargetELFStreamer can receive ABI info from many sources. For example, from the MipsAsmParser instance. Lifetime of the MipsAsmParser can be shorter than MipsTargetELFStreamer's lifetime. In that case we get a dangling pointer to MipsABIInfo. Differential Revision: http://reviews.llvm.org/D12805 llvm-svn: 247546
2015-09-14 19:18:03 +08:00
assert(ABI.hasValue() && "ABI hasn't been set!");
Move the Mips target to storing the ABI in the TargetMachine rather than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. llvm-svn: 227102
2015-01-27 01:33:46 +08:00
return *ABI;
}
[mips] Improve encapsulation of the .MIPS.abiflags implementation and limit scope of related enums Summary: Follow on to r212519 to improve the encapsulation and limit the scope of the enums. Also merged two very similar parser functions, fixed a bug where ASE's were not being reported, and marked CPR1's as being 128-bit when MSA is enabled. Differential Revision: http://reviews.llvm.org/D4384 llvm-svn: 212522
2014-07-08 18:11:38 +08:00
Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. llvm-svn: 212519
2014-07-08 16:59:22 +08:00
protected:
[mips] Save a copy of MipsABIInfo in the MipsTargetStreamer to escape a dangling pointer The MipsTargetELFStreamer can receive ABI info from many sources. For example, from the MipsAsmParser instance. Lifetime of the MipsAsmParser can be shorter than MipsTargetELFStreamer's lifetime. In that case we get a dangling pointer to MipsABIInfo. Differential Revision: http://reviews.llvm.org/D12805 llvm-svn: 247546
2015-09-14 19:18:03 +08:00
llvm::Optional<MipsABIInfo> ABI;
[mips] Improve encapsulation of the .MIPS.abiflags implementation and limit scope of related enums Summary: Follow on to r212519 to improve the encapsulation and limit the scope of the enums. Also merged two very similar parser functions, fixed a bug where ASE's were not being reported, and marked CPR1's as being 128-bit when MSA is enabled. Differential Revision: http://reviews.llvm.org/D4384 llvm-svn: 212522
2014-07-08 18:11:38 +08:00
MipsABIFlagsSection ABIFlagsSection;
Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. llvm-svn: 212519
2014-07-08 16:59:22 +08:00
Re-commit: [mips] Implement .ent, .end, .frame, .mask and .fmask. Patch by Matheus Almeida and Toma Tabacu The lld test failure on the previous attempt to commit was caused by the addition of the .pdr section causing the offsets it was checking to change. This has been fixed by removing the .ent/.end directives from that test since they weren't really needed. llvm-svn: 215535
2014-08-13 18:07:34 +08:00
bool GPRInfoSet;
unsigned GPRBitMask;
int GPROffset;
bool FPRInfoSet;
unsigned FPRBitMask;
int FPROffset;
bool FrameInfoSet;
int FrameOffset;
unsigned FrameReg;
unsigned ReturnReg;
Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. llvm-svn: 212519
2014-07-08 16:59:22 +08:00
private:
[mips] Rename [gs]etCanHaveModuleDir to more natural names Summary: getCanHaveModuleDir() is renamed to isModuleDirectiveAllowed(), and setCanHaveModuleDir() is renamed to forbidModuleDirective() since it is only ever given a false argument. Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D4885 llvm-svn: 215628
2014-08-14 17:18:14 +08:00
bool ModuleDirectiveAllowed;
Add a MCTargetStreamer interface. This patch fixes an old FIXME by creating a MCTargetStreamer interface and moving the target specific functions for ARM, Mips and PPC to it. The ARM streamer is still declared in a common place because it is used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are completely hidden in the corresponding Target directories. I will send an email to llvmdev with instructions on how to use this. llvm-svn: 192181
2013-10-08 21:08:17 +08:00
};
[Mips] MipsTargetStreamer refactoring. No functionality changes. llvm-svn: 195057
2013-11-19 07:55:27 +08:00
// This part is for ascii assembly output
class MipsTargetAsmStreamer : public MipsTargetStreamer {
reverts 195057 per request llvm-svn: 195152
2013-11-20 04:53:28 +08:00
formatted_raw_ostream &OS;
[Mips] MipsTargetStreamer refactoring. No functionality changes. llvm-svn: 195057
2013-11-19 07:55:27 +08:00
public:
Construct the MCStreamer before constructing the MCTargetStreamer. This has a few advantages: * Only targets that use a MCTargetStreamer have to worry about it. * There is never a MCTargetStreamer without a MCStreamer, so we can use a reference. * A MCTargetStreamer can talk to the MCStreamer in its constructor. llvm-svn: 200129
2014-01-26 14:06:37 +08:00
MipsTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS);
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitDirectiveSetMicroMips() override;
void emitDirectiveSetNoMicroMips() override;
void emitDirectiveSetMips16() override;
void emitDirectiveSetNoMips16() override;
void emitDirectiveSetReorder() override;
void emitDirectiveSetNoReorder() override;
void emitDirectiveSetMacro() override;
void emitDirectiveSetNoMacro() override;
[mips] Add assembler support for .set msa/nomsa directive. Summary: These directives are used to toggle whether the assembler accepts MSA-specific instructions or not. Patch by Matheus Almeida and Toma Tabacu. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4783 llvm-svn: 215099
2014-08-07 20:03:36 +08:00
void emitDirectiveSetMsa() override;
void emitDirectiveSetNoMsa() override;
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitDirectiveSetAt() override;
[mips] Improve support for the .set at/noat assembler directives. Summary: Made the following changes: Added calls to emitDirectiveSetNoAt() and emitDirectiveSetAt(). Added special emit function for .set at=$reg, emitDirectiveSetAtWithArg(unsigned RegNo). Improved parsing error checks for .set at. Refactored parser code for .set at. Improved testing of both directives. Improved code readability and comments. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7176 llvm-svn: 229097
2015-02-13 18:30:57 +08:00
void emitDirectiveSetAtWithArg(unsigned RegNo) override;
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitDirectiveSetNoAt() override;
void emitDirectiveEnd(StringRef Name) override;
void emitDirectiveEnt(const MCSymbol &Symbol) override;
void emitDirectiveAbiCalls() override;
void emitDirectiveNaN2008() override;
void emitDirectiveNaNLegacy() override;
void emitDirectiveOptionPic0() override;
void emitDirectiveOptionPic2() override;
[mips] [IAS] Add support for the .insn directive. Summary: This assembler directive marks the current label as an instruction label in microMIPS and MIPS16. This initial implementation works only for microMIPS. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8006 llvm-svn: 235084
2015-04-16 17:53:47 +08:00
void emitDirectiveInsn() override;
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitFrame(unsigned StackReg, unsigned StackSize,
unsigned ReturnReg) override;
void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override;
void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override;
[mips] Add assembler support for .set arch=x directive. Summary: This directive is similar to ".set mipsX". It is used to change the CPU target of the assembler, enabling it to accept instructions for a specific CPU. This patch only implements the r4000 CPU (which is treated internally as generic mips3) and the generic ISAs. Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4884 llvm-svn: 215978
2014-08-19 22:22:52 +08:00
void emitDirectiveSetArch(StringRef Arch) override;
[mips] Add assembler support for .set mips0 directive. Summary: This directive is used to reset the assembler options to their initial values. Assembly programmers use it in conjunction with the ".set mipsX" directives. This patch depends on the .set push/pop directive (http://reviews.llvm.org/D4821). Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4957 llvm-svn: 217438
2014-09-09 20:52:14 +08:00
void emitDirectiveSetMips0() override;
[mips] Add assembler support for '.set mipsX'. Summary: This patch also fixes an issue with the way the Mips assembler enables/disables architecture features. Before this patch, the assembler never disabled feature bits. For example, .set mips64 .set mips32r2 would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right. Unfortunately this isn't trivial to fix because there's not an easy way to clear feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits that imply the feature being cleared and not the implied bits by the feature (there's a better explanation to the code I added). Patch by Matheus Almeida and updated by Toma Tabacu Reviewers: vmedic, matheusalmeida, dsanders Reviewed By: dsanders Subscribers: tomatabacu, llvm-commits Differential Revision: http://reviews.llvm.org/D4123 llvm-svn: 214709
2014-08-04 20:20:00 +08:00
void emitDirectiveSetMips1() override;
void emitDirectiveSetMips2() override;
void emitDirectiveSetMips3() override;
void emitDirectiveSetMips4() override;
void emitDirectiveSetMips5() override;
void emitDirectiveSetMips32() override;
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitDirectiveSetMips32R2() override;
[mips] Add backend support for Mips32r[35] and Mips64r[35]. Summary: These ISA's didn't add any instructions so they are almost identical to Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA revision in .MIPS.abiflags is 3 or 5 respectively instead of 2. Reviewers: vmedic Reviewed By: vmedic Subscribers: tomatabacu, llvm-commits, atanasyan Differential Revision: http://reviews.llvm.org/D7381 llvm-svn: 229695
2015-02-19 00:24:50 +08:00
void emitDirectiveSetMips32R3() override;
void emitDirectiveSetMips32R5() override;
[mips] Add assembler support for '.set mipsX'. Summary: This patch also fixes an issue with the way the Mips assembler enables/disables architecture features. Before this patch, the assembler never disabled feature bits. For example, .set mips64 .set mips32r2 would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right. Unfortunately this isn't trivial to fix because there's not an easy way to clear feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits that imply the feature being cleared and not the implied bits by the feature (there's a better explanation to the code I added). Patch by Matheus Almeida and updated by Toma Tabacu Reviewers: vmedic, matheusalmeida, dsanders Reviewed By: dsanders Subscribers: tomatabacu, llvm-commits Differential Revision: http://reviews.llvm.org/D4123 llvm-svn: 214709
2014-08-04 20:20:00 +08:00
void emitDirectiveSetMips32R6() override;
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitDirectiveSetMips64() override;
void emitDirectiveSetMips64R2() override;
[mips] Add backend support for Mips32r[35] and Mips64r[35]. Summary: These ISA's didn't add any instructions so they are almost identical to Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA revision in .MIPS.abiflags is 3 or 5 respectively instead of 2. Reviewers: vmedic Reviewed By: vmedic Subscribers: tomatabacu, llvm-commits, atanasyan Differential Revision: http://reviews.llvm.org/D7381 llvm-svn: 229695
2015-02-19 00:24:50 +08:00
void emitDirectiveSetMips64R3() override;
void emitDirectiveSetMips64R5() override;
[mips] Add assembler support for '.set mipsX'. Summary: This patch also fixes an issue with the way the Mips assembler enables/disables architecture features. Before this patch, the assembler never disabled feature bits. For example, .set mips64 .set mips32r2 would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right. Unfortunately this isn't trivial to fix because there's not an easy way to clear feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits that imply the feature being cleared and not the implied bits by the feature (there's a better explanation to the code I added). Patch by Matheus Almeida and updated by Toma Tabacu Reviewers: vmedic, matheusalmeida, dsanders Reviewed By: dsanders Subscribers: tomatabacu, llvm-commits Differential Revision: http://reviews.llvm.org/D4123 llvm-svn: 214709
2014-08-04 20:20:00 +08:00
void emitDirectiveSetMips64R6() override;
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitDirectiveSetDsp() override;
[mips] Add assembler support for the .set nodsp directive. Summary: This directive is used to tell the assembler to reject DSP-specific instructions. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D5142 llvm-svn: 217946
2014-09-17 17:01:54 +08:00
void emitDirectiveSetNoDsp() override;
[mips] Add assembler support for .set push/pop directive. Summary: These directives are used to save the current assembler options (in the case of ".set push") and restore the previously saved options (in the case of ".set pop"). Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4821 llvm-svn: 217432
2014-09-09 18:15:38 +08:00
void emitDirectiveSetPop() override;
void emitDirectiveSetPush() override;
[mips] [IAS] Add support for the .set softfloat/hardfloat directives. Summary: These directives are used to set the current value of the SoftFloat feature. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D9074 llvm-svn: 238813
2015-06-02 17:48:04 +08:00
void emitDirectiveSetSoftFloat() override;
void emitDirectiveSetHardFloat() override;
[mips] Add support for .cpload. Summary: This directive is used for setting up $gp in the beginning of a function. It expands to three instructions if PIC is enabled: lui $gp, %hi(_gp_disp) addui $gp, $gp, %lo(_gp_disp) addu $gp, $gp, $reg _gp_disp is a special symbol that the linker sets to the distance between the lui instruction and the context pointer (_gp). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3480 llvm-svn: 207637
2014-04-30 19:28:42 +08:00
// PIC support
[mips] Rename emit and parse functions for the .cpload assembler directive. NFC. Summary: It's better if we have a consistent name for .cpload-related functions. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5437 llvm-svn: 218768
2014-10-01 22:53:19 +08:00
void emitDirectiveCpLoad(unsigned RegNo) override;
[mips] Move expansion of .cpsetup to target streamer. Summary: There are two functional changes: 1) The directive is not expanded for the ASM->ASM code path. 2) If PIC is not set, there's no expansion for the ASM->OBJ code path (same behaviour as GAS). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3482 llvm-svn: 207741
2014-05-01 18:24:46 +08:00
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
const MCSymbol &Sym, bool IsReg) override;
Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. llvm-svn: 212519
2014-07-08 16:59:22 +08:00
[mips] [IAS] Refactor the emitDirectiveModuleFP() functions. NFC. Summary: Simplify emitDirectiveModuleFP() by having it just print the current information from MipsABIFlagsSection and doing an updateABIInfo() before such calls. This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object, and also makes sure we use the update mechanism from MipsABIFlagsSection. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D10642 llvm-svn: 240637
2015-06-25 20:44:38 +08:00
// FP abiflags directives
void emitDirectiveModuleFP() override;
[mips] [IAS] Refactor the emitDirectiveModuleOddSPReg() functions. NFC. Summary: We can simplify emitDirectiveModuleOddSPReg() by having it print the current OddSPReg information from MipsABIFlagsSection and doing an updateABIInfo() before such calls. This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object, and also makes sure we use the update mechanism from MipsABIFlagsSection. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D10641 llvm-svn: 240630
2015-06-25 18:56:57 +08:00
void emitDirectiveModuleOddSPReg() override;
[mips] [IAS] Add support for the .module softfloat/hardfloat directives. These directives are used to set the default value of the SoftFloat feature. They have the same effect as setting -m{soft, hard}-float from the command line. Differential Revision: http://reviews.llvm.org/D9073 llvm-svn: 241066
2015-06-30 21:46:03 +08:00
void emitDirectiveModuleSoftFloat() override;
void emitDirectiveModuleHardFloat() override;
[mips] Add support for -modd-spreg/-mno-odd-spreg Summary: When -mno-odd-spreg is in effect, 32-bit floating point values are not permitted in odd FPU registers. The option also prohibits 32-bit and 64-bit floating point comparison results from being written to odd registers. This option has three purposes: * It allows support for certain MIPS implementations such as loongson-3a that do not allow the use of odd registers for single precision arithmetic. * When using -mfpxx, -mno-odd-spreg is the default and this allows us to statically check that code is compliant with the O32 FPXX ABI since mtc1/mfc1 instructions to/from odd registers are guaranteed not to appear for any reason. Once this has been established, the user can then re-enable -modd-spreg to regain the use of all 32 single-precision registers. * When using -mfp64 and -mno-odd-spreg together, an O32 extension named O32 FP64A is used as the ABI. This is intended to provide almost all functionality of an FR=1 processor but can also be executed on a FR=0 core with the assistance of a hardware compatibility mode which emulates FR=0 behaviour on an FR=1 processor. * Added '.module oddspreg' and '.module nooddspreg' each of which update the .MIPS.abiflags section appropriately * Moved setFpABI() call inside emitDirectiveModuleFP() so that the caller doesn't have to remember to do it. * MipsABIFlags now calculates the flags1 and flags2 member on demand rather than trying to maintain them in the same format they will be emitted in. There is one portion of the -mfp64 and -mno-odd-spreg combination that is not implemented yet. Moves to/from odd-numbered double-precision registers must not use mtc1. I will fix this in a follow-up. Differential Revision: http://reviews.llvm.org/D4383 llvm-svn: 212717
2014-07-10 21:38:23 +08:00
void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value) override;
[mips] [IAS] Add support for the .set oddspreg/nooddspreg directives. Differential Revision: http://reviews.llvm.org/D10657 llvm-svn: 241052
2015-06-30 17:36:50 +08:00
void emitDirectiveSetOddSPReg() override;
void emitDirectiveSetNoOddSPReg() override;
[Mips] MipsTargetStreamer refactoring. No functionality changes. llvm-svn: 195057
2013-11-19 07:55:27 +08:00
};
// This part is for ELF object output
class MipsTargetELFStreamer : public MipsTargetStreamer {
Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips". This matches what gnu as does and implementing this is easier than arguing about it. llvm-svn: 199181
2014-01-14 12:25:13 +08:00
bool MicroMipsEnabled;
Remove another hasRawTextSupport. To remove this one simply move the end of file logic from the asm printer to the target mc streamer. This removes the last call to hasRawTextSupport from lib/Target. llvm-svn: 200590
2014-02-01 07:10:26 +08:00
const MCSubtargetInfo &STI;
[mips] Add support for '.option pic2'. The directive '.option pic2' enables PIC from assembly source. At the moment none of the macros/directives check the PIC bit but that's going to be fixed relatively soon. For example, the expansion of macros like 'la' depend on the relocation model. llvm-svn: 204803
2014-03-26 21:40:29 +08:00
bool Pic;
[Mips] TargetStreamer Support for .set mips16. This patch updates .set mips16 support which affects the ELF ABI and its flags. In addition the patch uses a common interface for both the MipsTargetSteamer and MipsObjectStreamer that the assembler uses for both ELF and ASCII output for these directives. llvm-svn: 199851
2014-01-23 07:08:42 +08:00
[Mips] MipsTargetStreamer refactoring. No functionality changes. llvm-svn: 195057
2013-11-19 07:55:27 +08:00
public:
Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips". This matches what gnu as does and implementing this is easier than arguing about it. llvm-svn: 199181
2014-01-14 12:25:13 +08:00
bool isMicroMipsEnabled() const { return MicroMipsEnabled; }
[Mips] MipsTargetStreamer refactoring. No functionality changes. llvm-svn: 195057
2013-11-19 07:55:27 +08:00
MCELFStreamer &getStreamer();
Implement the missing bits corresponding to .mips_hack_elf_flags. These were: * noreorder handling on the target object streamer and asm parser. * setting the initial flag bits based on the enabled features. * setting the elf header flag for micromips It is *really* depressing I am the one doing this instead of someone at mips actually taking the time to understand the infrastructure. llvm-svn: 200138
2014-01-26 14:57:13 +08:00
MipsTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI);
Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips". This matches what gnu as does and implementing this is easier than arguing about it. llvm-svn: 199181
2014-01-14 12:25:13 +08:00
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitLabel(MCSymbol *Symbol) override;
void emitAssignment(MCSymbol *Symbol, const MCExpr *Value) override;
Switch all uses of LLVM_OVERRIDE to just use 'override' directly. llvm-svn: 202621
2014-03-02 17:09:27 +08:00
void finish() override;
Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips". This matches what gnu as does and implementing this is easier than arguing about it. llvm-svn: 199181
2014-01-14 12:25:13 +08:00
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitDirectiveSetMicroMips() override;
void emitDirectiveSetNoMicroMips() override;
void emitDirectiveSetMips16() override;
void emitDirectiveSetNoReorder() override;
void emitDirectiveEnd(StringRef Name) override;
void emitDirectiveEnt(const MCSymbol &Symbol) override;
void emitDirectiveAbiCalls() override;
void emitDirectiveNaN2008() override;
void emitDirectiveNaNLegacy() override;
void emitDirectiveOptionPic0() override;
void emitDirectiveOptionPic2() override;
[mips] [IAS] Add support for the .insn directive. Summary: This assembler directive marks the current label as an instruction label in microMIPS and MIPS16. This initial implementation works only for microMIPS. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8006 llvm-svn: 235084
2015-04-16 17:53:47 +08:00
void emitDirectiveInsn() override;
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
2014-04-29 15:58:02 +08:00
void emitFrame(unsigned StackReg, unsigned StackSize,
unsigned ReturnReg) override;
void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override;
void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override;
[mips] Add support for .cpload. Summary: This directive is used for setting up $gp in the beginning of a function. It expands to three instructions if PIC is enabled: lui $gp, %hi(_gp_disp) addui $gp, $gp, %lo(_gp_disp) addu $gp, $gp, $reg _gp_disp is a special symbol that the linker sets to the distance between the lui instruction and the context pointer (_gp). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3480 llvm-svn: 207637
2014-04-30 19:28:42 +08:00
// PIC support
[mips] Rename emit and parse functions for the .cpload assembler directive. NFC. Summary: It's better if we have a consistent name for .cpload-related functions. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5437 llvm-svn: 218768
2014-10-01 22:53:19 +08:00
void emitDirectiveCpLoad(unsigned RegNo) override;
[mips] Move expansion of .cpsetup to target streamer. Summary: There are two functional changes: 1) The directive is not expanded for the ASM->ASM code path. 2) If PIC is not set, there's no expansion for the ASM->OBJ code path (same behaviour as GAS). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3482 llvm-svn: 207741
2014-05-01 18:24:46 +08:00
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
const MCSymbol &Sym, bool IsReg) override;
[mips] Add support for .cpload. Summary: This directive is used for setting up $gp in the beginning of a function. It expands to three instructions if PIC is enabled: lui $gp, %hi(_gp_disp) addui $gp, $gp, %lo(_gp_disp) addu $gp, $gp, $reg _gp_disp is a special symbol that the linker sets to the distance between the lui instruction and the context pointer (_gp). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3480 llvm-svn: 207637
2014-04-30 19:28:42 +08:00
[mips] [IAS] Refactor MipsTargetStreamer::emitMipsAbiFlags(). NFC. Summary: Make emitMipsAbiFlags a direct member of MipsTargetELFStreamer, as that's the only place where it's used, and remove the empty implementations from MipsTargetStreamer and MipsTargetAsmStreamer. Reviewers: dsanders, rafael Reviewed By: rafael Subscribers: rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D8199 llvm-svn: 232161
2015-03-13 19:40:01 +08:00
void emitMipsAbiFlags();
[Mips] MipsTargetStreamer refactoring. No functionality changes. llvm-svn: 195057
2013-11-19 07:55:27 +08:00
};
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) Apparently, the style needs to be agreed upon first. llvm-svn: 240390
2015-06-23 17:49:53 +08:00
}
Add a MCTargetStreamer interface. This patch fixes an old FIXME by creating a MCTargetStreamer interface and moving the target specific functions for ARM, Mips and PPC to it. The ARM streamer is still declared in a common place because it is used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are completely hidden in the corresponding Target directories. I will send an email to llvmdev with instructions on how to use this. llvm-svn: 192181
2013-10-08 21:08:17 +08:00
#endif