2017-02-16 02:37:26 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mattr=+avx < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-scei-ps4"
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@G1 = common global <2 x float> zeroinitializer, align 8
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@G2 = common global <8 x float> zeroinitializer, align 32
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define <4 x float> @foo() {
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; CHECK-LABEL: foo:
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2017-12-05 01:18:51 +08:00
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; CHECK: # %bb.0: # %entry
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2017-02-16 02:37:26 +08:00
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; CHECK-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],mem[1,2,3]
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[2,0]
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; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,1,3]
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%V = load <2 x float>, <2 x float>* @G1, align 8
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%shuffle = shufflevector <2 x float> %V, <2 x float> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 undef, i32 undef, i32 undef>
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%L = load <8 x float>, <8 x float>* @G2, align 32
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%shuffle1 = shufflevector <8 x float> %shuffle, <8 x float> %L, <4 x i32> <i32 12, i32 10, i32 14, i32 4>
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ret <4 x float> %shuffle1
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}
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