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llvm-project/clang/test/Driver/hip-toolchain-mllvm.hip

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[HIP-Clang] propagate -mllvm options to opt and llc Change the HIP Toolchain to pass the OPT_mllvm options into OPT and LLC stages. Added a lit test to verify the command args. Reviewers: yaxunl Differential Revision: https://reviews.llvm.org/D59316 llvm-svn: 356277
2019-03-16 01:31:51 +08:00
// REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: amdgpu-registered-target
// RUN: %clang -### -target x86_64-linux-gnu \
[HIP] Let clang recognize .hip extension Differential Revision: https://reviews.llvm.org/D76039
2020-03-12 10:48:12 +08:00
// RUN: --cuda-gpu-arch=gfx803 --cuda-gpu-arch=gfx900 \
[HIP-Clang] propagate -mllvm options to opt and llc Change the HIP Toolchain to pass the OPT_mllvm options into OPT and LLC stages. Added a lit test to verify the command args. Reviewers: yaxunl Differential Revision: https://reviews.llvm.org/D59316 llvm-svn: 356277
2019-03-16 01:31:51 +08:00
// RUN: -mllvm -amdgpu-function-calls=0 \
// RUN: %s 2>&1 | FileCheck %s
[HIP] Add missing options for lto Add -mcpu, -mattr, -mllvm, and -save-temps options for lto when necessary. Differential Revision: https://reviews.llvm.org/D82506
2020-06-25 05:34:21 +08:00
// RUN: %clang -### -target x86_64-linux-gnu \
// RUN: --cuda-gpu-arch=gfx803 --cuda-gpu-arch=gfx900 \
// RUN: -fgpu-rdc -mllvm -amdgpu-function-calls=0 \
// RUN: %s 2>&1 | FileCheck -check-prefixes=CHECK,RDC %s
[clang][amdgpu] Use implicit code object version [clang][amdgpu] Use implicit code object version At present, clang always passes amdhsa-code-object-version on to -cc1. That is great for certainty over what object version is being used when debugging. Unfortunately, the command line argument is in AMDGPUBaseInfo.cpp in the amdgpu target. If clang is used with an llvm compiled with DLLVM_TARGETS_TO_BUILD that excludes amdgpu, this will be diagnosed (as discovered via D98658): - Unknown command line argument '--amdhsa-code-object-version=4' This means that clang, built only for X86, can be used to compile the nvptx devicertl for openmp but not the amdgpu one. That would shortly spawn fragile logic in the devicertl cmake to try to guess whether the clang used will work. This change omits the amdhsa-code-object-version parameter when it matches the default that AMDGPUBaseInfo.cpp specifies, with a comment to indicate why. As this is the only part of clang's codegen for amdgpu that depends on the target in the back end it suffices to build the openmp runtime on most (all?) systems. It is a non-functional change, though observable in the updated tests and when compiling with -###. It may cause minor disruption to the amd-stg-open branch. Revision of D98746, builds on refactor in D101077 Reviewed By: yaxunl Differential Revision: https://reviews.llvm.org/D101095
2021-04-24 06:52:49 +08:00
// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "amdgcn-amd-amdhsa"
Move options to separate checks that do not need to immediately follow the previous option. NFCI llvm-svn: 356507
2019-03-20 03:34:15 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
[HIP-Clang] propagate -mllvm options to opt and llc Change the HIP Toolchain to pass the OPT_mllvm options into OPT and LLC stages. Added a lit test to verify the command args. Reviewers: yaxunl Differential Revision: https://reviews.llvm.org/D59316 llvm-svn: 356277
2019-03-16 01:31:51 +08:00
// CHECK-SAME: {{.*}} "-target-cpu" "gfx803"
// CHECK-SAME: {{.*}} "-mllvm" "-amdgpu-function-calls=0" {{.*}}
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-NOT: {{".*opt"}}
// CHECK-NOT: {{".*llc"}}
[HIP] Add missing options for lto Add -mcpu, -mattr, -mllvm, and -save-temps options for lto when necessary. Differential Revision: https://reviews.llvm.org/D82506
2020-06-25 05:34:21 +08:00
// RDC: [[LLD:".*lld.*"]] {{.*}} "-plugin-opt=-amdgpu-function-calls=0"
[HIP-Clang] propagate -mllvm options to opt and llc Change the HIP Toolchain to pass the OPT_mllvm options into OPT and LLC stages. Added a lit test to verify the command args. Reviewers: yaxunl Differential Revision: https://reviews.llvm.org/D59316 llvm-svn: 356277
2019-03-16 01:31:51 +08:00
[clang][amdgpu] Use implicit code object version [clang][amdgpu] Use implicit code object version At present, clang always passes amdhsa-code-object-version on to -cc1. That is great for certainty over what object version is being used when debugging. Unfortunately, the command line argument is in AMDGPUBaseInfo.cpp in the amdgpu target. If clang is used with an llvm compiled with DLLVM_TARGETS_TO_BUILD that excludes amdgpu, this will be diagnosed (as discovered via D98658): - Unknown command line argument '--amdhsa-code-object-version=4' This means that clang, built only for X86, can be used to compile the nvptx devicertl for openmp but not the amdgpu one. That would shortly spawn fragile logic in the devicertl cmake to try to guess whether the clang used will work. This change omits the amdhsa-code-object-version parameter when it matches the default that AMDGPUBaseInfo.cpp specifies, with a comment to indicate why. As this is the only part of clang's codegen for amdgpu that depends on the target in the back end it suffices to build the openmp runtime on most (all?) systems. It is a non-functional change, though observable in the updated tests and when compiling with -###. It may cause minor disruption to the amd-stg-open branch. Revision of D98746, builds on refactor in D101077 Reviewed By: yaxunl Differential Revision: https://reviews.llvm.org/D101095
2021-04-24 06:52:49 +08:00
// CHECK: [[CLANG]] "-cc1" "-triple" "amdgcn-amd-amdhsa"
Move options to separate checks that do not need to immediately follow the previous option. NFCI llvm-svn: 356507
2019-03-20 03:34:15 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
[HIP-Clang] propagate -mllvm options to opt and llc Change the HIP Toolchain to pass the OPT_mllvm options into OPT and LLC stages. Added a lit test to verify the command args. Reviewers: yaxunl Differential Revision: https://reviews.llvm.org/D59316 llvm-svn: 356277
2019-03-16 01:31:51 +08:00
// CHECK-SAME: {{.*}} "-target-cpu" "gfx900"
// CHECK-SAME: {{.*}} "-mllvm" "-amdgpu-function-calls=0" {{.*}}
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-NOT: {{".*opt"}}
// CHECK-NOT: {{".*llc"}}
[HIP] Add missing options for lto Add -mcpu, -mattr, -mllvm, and -save-temps options for lto when necessary. Differential Revision: https://reviews.llvm.org/D82506
2020-06-25 05:34:21 +08:00
// RDC: [[LLD:".*lld.*"]] {{.*}} "-plugin-opt=-amdgpu-function-calls=0"