forked from OSchip/llvm-project
82 lines
3.3 KiB
LLVM
82 lines
3.3 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -newgvn -S < %s | FileCheck %s
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; Make sure the created ssa copies are cleaned up. See PR38804.
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; CHECK-NOT: ssa_copy
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@b = external dso_local local_unnamed_addr global i32, align 4
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@a = external dso_local local_unnamed_addr global i8, align 1
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@f = external dso_local local_unnamed_addr global i16, align 2
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define void @g() {
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; CHECK-LABEL: @g(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 undef, label [[FOR_COND1THREAD_PRE_SPLIT:%.*]], label [[FOR_COND_PREHEADER:%.*]]
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; CHECK: for.cond.preheader:
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; CHECK-NEXT: unreachable
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; CHECK: for.cond1thread-pre-split:
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; CHECK-NEXT: br label [[FOR_END4_SPLIT:%.*]]
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; CHECK: for.end4.split:
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; CHECK-NEXT: br i1 true, label [[FOR_COND6_PREHEADER:%.*]], label [[IF_END11:%.*]]
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; CHECK: for.cond6.preheader:
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; CHECK-NEXT: br i1 undef, label [[FOR_COND6_PREHEADER3:%.*]], label [[IF_END11_LOOPEXIT:%.*]]
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; CHECK: for.cond6.preheader3:
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; CHECK-NEXT: br label [[IF_END11_LOOPEXIT]]
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; CHECK: if.end11.loopexit:
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; CHECK-NEXT: [[STOREMERGE_LCSSA:%.*]] = phi i32 [ 0, [[FOR_COND6_PREHEADER]] ], [ 1, [[FOR_COND6_PREHEADER3]] ]
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; CHECK-NEXT: store i32 [[STOREMERGE_LCSSA]], i32* @b, align 4
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; CHECK-NEXT: br label [[IF_END11]]
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; CHECK: if.end11:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @b, align 4
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; CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @a, align 1
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; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP1]] to i32
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; CHECK-NEXT: [[CMP12:%.*]] = icmp eq i32 [[TMP0]], [[CONV]]
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; CHECK-NEXT: br i1 [[CMP12]], label [[IF_THEN14:%.*]], label [[IF_END16:%.*]]
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; CHECK: if.then14:
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; CHECK-NEXT: [[CONV15:%.*]] = trunc i32 [[TMP0]] to i16
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; CHECK-NEXT: store i16 [[CONV15]], i16* @f, align 2
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; CHECK-NEXT: unreachable
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; CHECK: if.end16:
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; CHECK-NEXT: ret void
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;
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entry:
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%tobool = icmp eq i32 undef, 0
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br i1 %tobool, label %for.cond1thread-pre-split, label %for.cond.preheader
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for.cond.preheader: ; preds = %entry
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unreachable
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for.cond1thread-pre-split: ; preds = %entry
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br label %for.end4.split
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for.end4.split: ; preds = %for.cond1thread-pre-split
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br i1 %tobool, label %for.cond6.preheader, label %if.end11
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for.cond6.preheader: ; preds = %for.end4.split
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br i1 undef, label %for.cond6.preheader3, label %if.end11.loopexit
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for.cond6.preheader3: ; preds = %for.cond6.preheader
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br label %if.end11.loopexit
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if.end11.loopexit: ; preds = %for.cond6.preheader3, %for.cond6.preheader
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%storemerge.lcssa = phi i32 [ 0, %for.cond6.preheader ], [ 1, %for.cond6.preheader3 ]
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store i32 %storemerge.lcssa, i32* @b, align 4
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br label %if.end11
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if.end11: ; preds = %if.end11.loopexit, %for.end4.split
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%0 = load i32, i32* @b, align 4
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%1 = load i8, i8* @a, align 1
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%conv = sext i8 %1 to i32
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%cmp12 = icmp eq i32 %0, %conv
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br i1 %cmp12, label %if.then14, label %if.end16
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if.then14: ; preds = %if.end11
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%conv15 = trunc i32 %0 to i16
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store i16 %conv15, i16* @f, align 2
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unreachable
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if.end16: ; preds = %if.end11
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ret void
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}
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