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llvm-project/llvm/test/CodeGen/X86/mul-constant-i64.ll

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[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule=true -mcpu=haswell| FileCheck %s --check-prefix=X64-HSW
; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule=true -mcpu=btver2| FileCheck %s --check-prefix=X64-JAG
; RUN: llc < %s -mtriple=i686-unknown -mul-constant-optimization=false | FileCheck %s --check-prefix=X86-NOOPT
; RUN: llc < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -print-schedule=true -mcpu=haswell| FileCheck %s --check-prefix=HSW-NOOPT
; RUN: llc < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -print-schedule=true -mcpu=btver2| FileCheck %s --check-prefix=JAG-NOOPT
; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule=true -mcpu=slm| FileCheck %s --check-prefix=X64-SLM
; RUN: llc < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -print-schedule=true -mcpu=slm| FileCheck %s --check-prefix=SLM-NOOPT
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
define i64 @test_mul_by_1(i64 %x) nounwind {
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-LABEL: test_mul_by_1:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_1:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_1:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_1:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_1:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_1:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.17]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_1:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_1:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.50]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 1
ret i64 %mul
}
define i64 @test_mul_by_2(i64 %x) {
; X86-LABEL: test_mul_by_2:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $1, %eax, %edx
; X86-NEXT: addl %eax, %eax
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_2:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_2:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_2:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $1, %eax, %edx
; X86-NOOPT-NEXT: addl %eax, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_2:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_2:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_2:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_2:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 2
ret i64 %mul
}
define i64 @test_mul_by_3(i64 %x) {
; X86-LABEL: test_mul_by_3:
; X86: # BB#0:
; X86-NEXT: movl $3, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: imull $3, {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_3:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_3:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_3:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $3, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $3, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_3:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_3:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_3:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_3:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 3
ret i64 %mul
}
define i64 @test_mul_by_4(i64 %x) {
; X86-LABEL: test_mul_by_4:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $2, %eax, %edx
; X86-NEXT: shll $2, %eax
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_4:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (,%rdi,4), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_4:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_4:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $2, %eax, %edx
; X86-NOOPT-NEXT: shll $2, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_4:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: leaq (,%rdi,4), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_4:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: leaq (,%rdi,4), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_4:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_4:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: leaq (,%rdi,4), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 4
ret i64 %mul
}
define i64 @test_mul_by_5(i64 %x) {
; X86-LABEL: test_mul_by_5:
; X86: # BB#0:
; X86-NEXT: movl $5, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: imull $5, {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_5:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_5:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_5:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $5, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $5, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_5:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_5:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_5:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_5:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 5
ret i64 %mul
}
define i64 @test_mul_by_6(i64 %x) {
; X86-LABEL: test_mul_by_6:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: movl $6, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: leal (%edx,%ecx,2), %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_6:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: addq %rdi, %rdi # sched: [1:0.25]
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_6:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_6:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $6, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $6, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_6:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $6, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_6:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $6, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_6:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-SLM-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_6:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $6, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 6
ret i64 %mul
}
define i64 @test_mul_by_7(i64 %x) {
; X86-LABEL: test_mul_by_7:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (,%eax,8), %ecx
; X86-NEXT: subl %eax, %ecx
; X86-NEXT: movl $7, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_7:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_7:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_7:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $7, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $7, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_7:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $7, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_7:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $7, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_7:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_7:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $7, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 7
ret i64 %mul
}
define i64 @test_mul_by_8(i64 %x) {
; X86-LABEL: test_mul_by_8:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $3, %eax, %edx
; X86-NEXT: shll $3, %eax
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_8:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_8:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_8:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $3, %eax, %edx
; X86-NOOPT-NEXT: shll $3, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_8:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_8:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_8:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_8:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: leaq (,%rdi,8), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 8
ret i64 %mul
}
define i64 @test_mul_by_9(i64 %x) {
; X86-LABEL: test_mul_by_9:
; X86: # BB#0:
; X86-NEXT: movl $9, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: imull $9, {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_9:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_9:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_9:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $9, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $9, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_9:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_9:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_9:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_9:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 9
ret i64 %mul
}
define i64 @test_mul_by_10(i64 %x) {
; X86-LABEL: test_mul_by_10:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: movl $10, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: leal (%edx,%ecx,2), %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_10:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: addq %rdi, %rdi # sched: [1:0.25]
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_10:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_10:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $10, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $10, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_10:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $10, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_10:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $10, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_10:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_10:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $10, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 10
ret i64 %mul
}
define i64 @test_mul_by_11(i64 %x) {
; X86-LABEL: test_mul_by_11:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,2), %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $11, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_11:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,2), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_11:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_11:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $11, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $11, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_11:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $11, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_11:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $11, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_11:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $11, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_11:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $11, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 11
ret i64 %mul
}
define i64 @test_mul_by_12(i64 %x) {
; X86-LABEL: test_mul_by_12:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: movl $12, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: leal (%edx,%ecx,4), %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_12:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: shlq $2, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_12:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: shlq $2, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_12:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $12, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $12, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_12:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $12, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_12:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $12, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_12:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: shlq $2, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_12:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $12, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 12
ret i64 %mul
}
define i64 @test_mul_by_13(i64 %x) {
; X86-LABEL: test_mul_by_13:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $13, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_13:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_13:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_13:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $13, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $13, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_13:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $13, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_13:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $13, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_13:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $13, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_13:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $13, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 13
ret i64 %mul
}
define i64 @test_mul_by_14(i64 %x) {
; X86-LABEL: test_mul_by_14:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
; X86-NEXT: addl %eax, %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $14, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_14:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_14:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_14:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $14, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $14, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_14:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $14, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_14:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $14, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_14:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $14, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_14:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $14, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 14
ret i64 %mul
}
define i64 @test_mul_by_15(i64 %x) {
; X86-LABEL: test_mul_by_15:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $15, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: leal (%ecx,%ecx,4), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_15:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_15:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_15:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $15, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $15, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_15:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $15, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_15:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $15, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_15:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_15:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $15, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 15
ret i64 %mul
}
define i64 @test_mul_by_16(i64 %x) {
; X86-LABEL: test_mul_by_16:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $4, %eax, %edx
; X86-NEXT: shll $4, %eax
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_16:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: shlq $4, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_16:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: shlq $4, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_16:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $4, %eax, %edx
; X86-NOOPT-NEXT: shll $4, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_16:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: shlq $4, %rdi # sched: [1:0.50]
; HSW-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_16:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: shlq $4, %rdi # sched: [1:0.50]
; JAG-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.17]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_16:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: shlq $4, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_16:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: shlq $4, %rdi # sched: [1:1.00]
; SLM-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.50]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 16
ret i64 %mul
}
define i64 @test_mul_by_17(i64 %x) {
; X86-LABEL: test_mul_by_17:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $4, %ecx
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: movl $17, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_17:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: shlq $4, %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rdi), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_17:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: shlq $4, %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rdi), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_17:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $17, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $17, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_17:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $17, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_17:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $17, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_17:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: shlq $4, %rax # sched: [1:1.00]
; X64-SLM-NEXT: addq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_17:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $17, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 17
ret i64 %mul
}
define i64 @test_mul_by_18(i64 %x) {
; X86-LABEL: test_mul_by_18:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: movl $18, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: leal (%edx,%ecx,2), %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_18:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: addq %rdi, %rdi # sched: [1:0.25]
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_18:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_18:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $18, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $18, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_18:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $18, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_18:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $18, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_18:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-SLM-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_18:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $18, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 18
ret i64 %mul
}
define i64 @test_mul_by_19(i64 %x) {
; X86-LABEL: test_mul_by_19:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: shll $2, %ecx
; X86-NEXT: subl %eax, %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $19, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_19:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: shlq $2, %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_19:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: shlq $2, %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_19:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $19, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $19, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_19:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $19, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_19:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $19, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_19:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $19, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_19:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $19, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 19
ret i64 %mul
}
define i64 @test_mul_by_20(i64 %x) {
; X86-LABEL: test_mul_by_20:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: movl $20, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: leal (%edx,%ecx,4), %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_20:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: shlq $2, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_20:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: shlq $2, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_20:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $20, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $20, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_20:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $20, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_20:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $20, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_20:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: shlq $2, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_20:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $20, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 20
ret i64 %mul
}
define i64 @test_mul_by_21(i64 %x) {
; X86-LABEL: test_mul_by_21:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $21, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_21:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_21:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_21:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $21, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $21, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_21:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $21, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_21:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $21, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_21:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $21, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_21:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $21, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 21
ret i64 %mul
}
define i64 @test_mul_by_22(i64 %x) {
; X86-LABEL: test_mul_by_22:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
; X86-NEXT: addl %eax, %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $22, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_22:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_22:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_22:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $22, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $22, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_22:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $22, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_22:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $22, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_22:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $22, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_22:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $22, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 22
ret i64 %mul
}
define i64 @test_mul_by_23(i64 %x) {
; X86-LABEL: test_mul_by_23:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: shll $3, %ecx
; X86-NEXT: subl %eax, %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $23, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_23:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: shlq $3, %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_23:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: shlq $3, %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_23:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $23, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $23, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_23:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $23, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_23:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $23, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_23:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $23, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_23:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $23, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 23
ret i64 %mul
}
define i64 @test_mul_by_24(i64 %x) {
; X86-LABEL: test_mul_by_24:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: movl $24, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: leal (%edx,%ecx,8), %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_24:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: shlq $3, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_24:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: shlq $3, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_24:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $24, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $24, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_24:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $24, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_24:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $24, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_24:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: shlq $3, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_24:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $24, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 24
ret i64 %mul
}
define i64 @test_mul_by_25(i64 %x) {
; X86-LABEL: test_mul_by_25:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $25, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: leal (%ecx,%ecx,4), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_25:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,4), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_25:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_25:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $25, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $25, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_25:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $25, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_25:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $25, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_25:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rax,%rax,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_25:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $25, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 25
ret i64 %mul
}
define i64 @test_mul_by_26(i64 %x) {
; X86-LABEL: test_mul_by_26:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: subl %eax, %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $26, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_26:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_26:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_26:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $26, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $26, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_26:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $26, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_26:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $26, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_26:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $26, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_26:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $26, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 26
ret i64 %mul
}
define i64 @test_mul_by_27(i64 %x) {
; X86-LABEL: test_mul_by_27:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $27, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: leal (%ecx,%ecx,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_27:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_27:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_27:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $27, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $27, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_27:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $27, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_27:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $27, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_27:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_27:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $27, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 27
ret i64 %mul
}
define i64 @test_mul_by_28(i64 %x) {
; X86-LABEL: test_mul_by_28:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %eax, %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $28, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_28:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_28:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_28:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $28, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $28, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_28:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $28, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_28:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $28, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_28:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $28, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_28:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $28, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 28
ret i64 %mul
}
define i64 @test_mul_by_29(i64 %x) {
; X86-LABEL: test_mul_by_29:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
Revert "[X86] Improvement in CodeGen instruction selection for LEAs." This reverts r319543, due to ASan bot breakage. llvm-svn: 319591
2017-12-02 06:20:26 +08:00
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: addl %eax, %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $29, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_29:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
Revert "[X86] Improvement in CodeGen instruction selection for LEAs." This reverts r319543, due to ASan bot breakage. llvm-svn: 319591
2017-12-02 06:20:26 +08:00
; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_29:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
Revert "[X86] Improvement in CodeGen instruction selection for LEAs." This reverts r319543, due to ASan bot breakage. llvm-svn: 319591
2017-12-02 06:20:26 +08:00
; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_29:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $29, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $29, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_29:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $29, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_29:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $29, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_29:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $29, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_29:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $29, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 29
ret i64 %mul
}
define i64 @test_mul_by_30(i64 %x) {
; X86-LABEL: test_mul_by_30:
; X86: # BB#0:
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $5, %ecx
; X86-NEXT: subl %eax, %ecx
; X86-NEXT: subl %eax, %ecx
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
; X86-NEXT: movl $30, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_30:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: shlq $5, %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_30:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: shlq $5, %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_30:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $30, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $30, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_30:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $30, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_30:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $30, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_30:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: imulq $30, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_30:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $30, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 30
ret i64 %mul
}
define i64 @test_mul_by_31(i64 %x) {
; X86-LABEL: test_mul_by_31:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $5, %ecx
; X86-NEXT: subl %eax, %ecx
; X86-NEXT: movl $31, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_31:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: shlq $5, %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_31:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: shlq $5, %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_31:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl $31, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $31, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_31:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: imulq $31, %rdi, %rax # sched: [3:1.00]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_31:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: imulq $31, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_31:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: shlq $5, %rax # sched: [1:1.00]
; X64-SLM-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_31:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: imulq $31, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 31
ret i64 %mul
}
define i64 @test_mul_by_32(i64 %x) {
; X86-LABEL: test_mul_by_32:
; X86: # BB#0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $5, %eax, %edx
; X86-NEXT: shll $5, %eax
; X86-NEXT: retl
;
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; X64-HSW-LABEL: test_mul_by_32:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: shlq $5, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_by_32:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: shlq $5, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_32:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $5, %eax, %edx
; X86-NOOPT-NEXT: shll $5, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_32:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: shlq $5, %rdi # sched: [1:0.50]
; HSW-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_by_32:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: shlq $5, %rdi # sched: [1:0.50]
; JAG-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.17]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_32:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: shlq $5, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_32:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: shlq $5, %rdi # sched: [1:1.00]
; SLM-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.50]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
[X86] Add multiply by constant tests (PR28513) As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
2017-03-22 20:03:56 +08:00
%mul = mul nsw i64 %x, 32
ret i64 %mul
}
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
; (x*9+42)*(x*5+2)
define i64 @test_mul_spec(i64 %x) nounwind {
; X86-LABEL: test_mul_spec:
; X86: # BB#0:
; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl $9, %edx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: movl %eax, %esi
; X86-NEXT: leal (%edi,%edi,8), %ebx
; X86-NEXT: addl $42, %esi
; X86-NEXT: adcl %edx, %ebx
; X86-NEXT: movl $5, %edx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: leal (%edi,%edi,4), %edi
; X86-NEXT: addl $2, %ecx
; X86-NEXT: adcl %edx, %edi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %ecx
; X86-NEXT: imull %esi, %edi
; X86-NEXT: addl %edi, %edx
; X86-NEXT: imull %ebx, %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_spec:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rcx # sched: [1:0.50]
; X64-HSW-NEXT: addq $42, %rcx # sched: [1:0.25]
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: addq $2, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; X64-HSW-NEXT: imulq %rcx, %rax # sched: [4:1.00]
; X64-HSW-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; X64-JAG-LABEL: test_mul_spec:
; X64-JAG: # BB#0:
; X64-JAG-NEXT: leaq 42(%rdi,%rdi,8), %rcx # sched: [1:0.50]
; X64-JAG-NEXT: leaq 2(%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: imulq %rcx, %rax # sched: [3:1.00]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_spec:
; X86-NOOPT: # BB#0:
; X86-NOOPT-NEXT: pushl %ebx
; X86-NOOPT-NEXT: pushl %edi
; X86-NOOPT-NEXT: pushl %esi
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NOOPT-NEXT: movl $9, %edx
; X86-NOOPT-NEXT: movl %ecx, %eax
; X86-NOOPT-NEXT: mull %edx
; X86-NOOPT-NEXT: movl %eax, %esi
; X86-NOOPT-NEXT: leal (%edi,%edi,8), %ebx
; X86-NOOPT-NEXT: addl $42, %esi
; X86-NOOPT-NEXT: adcl %edx, %ebx
; X86-NOOPT-NEXT: movl $5, %edx
; X86-NOOPT-NEXT: movl %ecx, %eax
; X86-NOOPT-NEXT: mull %edx
; X86-NOOPT-NEXT: movl %eax, %ecx
; X86-NOOPT-NEXT: leal (%edi,%edi,4), %edi
; X86-NOOPT-NEXT: addl $2, %ecx
; X86-NOOPT-NEXT: adcl %edx, %edi
; X86-NOOPT-NEXT: movl %esi, %eax
; X86-NOOPT-NEXT: mull %ecx
; X86-NOOPT-NEXT: imull %esi, %edi
; X86-NOOPT-NEXT: addl %edi, %edx
; X86-NOOPT-NEXT: imull %ebx, %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx
; X86-NOOPT-NEXT: popl %esi
; X86-NOOPT-NEXT: popl %edi
; X86-NOOPT-NEXT: popl %ebx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_spec:
; HSW-NOOPT: # BB#0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,8), %rcx # sched: [1:0.50]
; HSW-NOOPT-NEXT: addq $42, %rcx # sched: [1:0.25]
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; HSW-NOOPT-NEXT: addq $2, %rax # sched: [1:0.25]
[X86][Haswell] Updating HSW instruction scheduling information This patch completely replaces the instruction scheduling information for the Haswell architecture target by modifying the file X86SchedHaswell.td located under the X86 Target. We used the scheduling information retrieved from the Haswell architects in order to replace and modify the existing scheduling. The patch continues the scheduling replacement effort started with the SNB target in r307529 and r310792. Information includes latency, number of micro-Ops and used ports by each HSW instruction. Please expect some performance fluctuations due to code alignment effects. Reviewers: RKSimon, zvi, aymanmus, craig.topper, m_zuckerman, igorb, dim, chandlerc, aaboud Differential Revision: https://reviews.llvm.org/D36663 llvm-svn: 311879
2017-08-28 18:04:16 +08:00
; HSW-NOOPT-NEXT: imulq %rcx, %rax # sched: [4:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
This patch closes PR28513: an optimization of multiplication by different constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
2017-06-08 18:20:13 +08:00
;
; JAG-NOOPT-LABEL: test_mul_spec:
; JAG-NOOPT: # BB#0:
; JAG-NOOPT-NEXT: leaq 42(%rdi,%rdi,8), %rcx # sched: [1:0.50]
; JAG-NOOPT-NEXT: leaq 2(%rdi,%rdi,4), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: imulq %rcx, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_spec:
; X64-SLM: # BB#0:
; X64-SLM-NEXT: leaq 42(%rdi,%rdi,8), %rcx # sched: [1:1.00]
; X64-SLM-NEXT: leaq 2(%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: imulq %rcx, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_spec:
; SLM-NOOPT: # BB#0:
; SLM-NOOPT-NEXT: leaq 42(%rdi,%rdi,8), %rcx # sched: [1:1.00]
; SLM-NOOPT-NEXT: leaq 2(%rdi,%rdi,4), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: imulq %rcx, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 9
%add = add nsw i64 %mul, 42
%mul2 = mul nsw i64 %x, 5
%add2 = add nsw i64 %mul2, 2
%mul3 = mul nsw i64 %add, %add2
ret i64 %mul3
}