forked from OSchip/llvm-project
50 lines
1.8 KiB
LLVM
50 lines
1.8 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X64
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define i8 @test_lwpins64_rri(i64 %a0, i32 %a1) nounwind {
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; X64-LABEL: test_lwpins64_rri:
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; X64: # BB#0:
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; X64-NEXT: lwpins $-1985229329, %esi, %rdi # imm = 0x89ABCDEF
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%1 = tail call i8 @llvm.x86.lwpins64(i64 %a0, i32 %a1, i32 2309737967)
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ret i8 %1
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}
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define i8 @test_lwpins64_rmi(i64 %a0, i32 *%p1) nounwind {
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; X64-LABEL: test_lwpins64_rmi:
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; X64: # BB#0:
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; X64-NEXT: lwpins $1985229328, (%rsi), %rdi # imm = 0x76543210
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%a1 = load i32, i32 *%p1
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%1 = tail call i8 @llvm.x86.lwpins64(i64 %a0, i32 %a1, i32 1985229328)
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ret i8 %1
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}
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define void @test_lwpval64_rri(i64 %a0, i32 %a1) nounwind {
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; X64-LABEL: test_lwpval64_rri:
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; X64: # BB#0:
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; X64-NEXT: lwpval $-19088744, %esi, %rdi # imm = 0xFEDCBA98
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; X64-NEXT: retq
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tail call void @llvm.x86.lwpval64(i64 %a0, i32 %a1, i32 4275878552)
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ret void
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}
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define void @test_lwpval64_rmi(i64 %a0, i32 *%p1) nounwind {
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; X64-LABEL: test_lwpval64_rmi:
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; X64: # BB#0:
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; X64-NEXT: lwpval $305419896, (%rsi), %rdi # imm = 0x12345678
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; X64-NEXT: retq
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%a1 = load i32, i32 *%p1
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tail call void @llvm.x86.lwpval64(i64 %a0, i32 %a1, i32 305419896)
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ret void
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}
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declare i8 @llvm.x86.lwpins64(i64, i32, i32) nounwind
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declare void @llvm.x86.lwpval64(i64, i32, i32) nounwind
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