2017-09-14 05:15:20 +08:00
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//===- BranchRelaxation.cpp -----------------------------------------------===//
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2014-03-29 18:18:08 +08:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/SmallVector.h"
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2014-07-25 19:42:14 +08:00
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#include "llvm/ADT/Statistic.h"
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2016-12-17 07:55:37 +08:00
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#include "llvm/CodeGen/LivePhysRegs.h"
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2017-09-14 05:15:20 +08:00
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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2014-03-29 18:18:08 +08:00
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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2016-10-07 00:20:41 +08:00
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#include "llvm/CodeGen/RegisterScavenging.h"
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2017-11-08 09:01:31 +08:00
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/DebugLoc.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Compiler.h"
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2014-03-29 18:18:08 +08:00
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Format.h"
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2017-09-14 05:15:20 +08:00
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#include "llvm/Support/MathExtras.h"
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2014-03-29 18:18:08 +08:00
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#include "llvm/Support/raw_ostream.h"
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#include <cassert>
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#include <cstdint>
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#include <iterator>
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#include <memory>
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2016-10-06 23:38:53 +08:00
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2014-03-29 18:18:08 +08:00
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using namespace llvm;
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2016-10-06 23:38:53 +08:00
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#define DEBUG_TYPE "branch-relaxation"
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2014-04-22 10:41:26 +08:00
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2014-03-29 18:18:08 +08:00
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STATISTIC(NumSplit, "Number of basic blocks split");
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2016-08-23 09:30:30 +08:00
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STATISTIC(NumConditionalRelaxed, "Number of conditional branches relaxed");
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2016-10-07 00:20:41 +08:00
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STATISTIC(NumUnconditionalRelaxed, "Number of unconditional branches relaxed");
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2014-03-29 18:18:08 +08:00
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2016-10-06 23:38:53 +08:00
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#define BRANCH_RELAX_NAME "Branch relaxation pass"
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2015-08-06 00:12:10 +08:00
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2014-03-29 18:18:08 +08:00
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namespace {
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class BranchRelaxation : public MachineFunctionPass {
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2014-03-29 18:18:08 +08:00
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/// BasicBlockInfo - Information about the offset and size of a single
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/// basic block.
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struct BasicBlockInfo {
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/// Offset - Distance from the beginning of the function to the beginning
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/// of this basic block.
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///
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/// The offset is always aligned as required by the basic block.
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unsigned Offset = 0;
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2014-03-29 18:18:08 +08:00
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/// Size - Size of the basic block in bytes. If the block contains
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/// inline assembly, this is a worst case estimate.
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///
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/// The size does not include any alignment padding whether from the
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/// beginning of the block, or from an aligned jump table at the end.
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unsigned Size = 0;
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2014-03-29 18:18:08 +08:00
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BasicBlockInfo() = default;
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2016-10-07 00:00:58 +08:00
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/// Compute the offset immediately following this block. \p MBB is the next
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/// block.
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unsigned postOffset(const MachineBasicBlock &MBB) const {
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unsigned PO = Offset + Size;
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unsigned Align = MBB.getAlignment();
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if (Align == 0)
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return PO;
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unsigned AlignAmt = 1 << Align;
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unsigned ParentAlign = MBB.getParent()->getAlignment();
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if (Align <= ParentAlign)
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return PO + OffsetToAlignment(PO, AlignAmt);
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// The alignment of this MBB is larger than the function's alignment, so we
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// can't tell whether or not it will insert nops. Assume that it will.
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return PO + AlignAmt + OffsetToAlignment(PO, AlignAmt);
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2014-03-29 18:18:08 +08:00
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}
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};
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SmallVector<BasicBlockInfo, 16> BlockInfo;
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std::unique_ptr<RegScavenger> RS;
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LivePhysRegs LiveRegs;
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2014-03-29 18:18:08 +08:00
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MachineFunction *MF;
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const TargetRegisterInfo *TRI;
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const TargetInstrInfo *TII;
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2014-03-29 18:18:08 +08:00
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bool relaxBranchInstructions();
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void scanFunction();
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2016-10-07 00:20:41 +08:00
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MachineBasicBlock *createNewBlockAfter(MachineBasicBlock &BB);
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2016-11-03 00:18:29 +08:00
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MachineBasicBlock *splitBlockBeforeInstr(MachineInstr &MI,
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MachineBasicBlock *DestBB);
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2014-04-16 08:42:46 +08:00
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void adjustBlockOffsets(MachineBasicBlock &MBB);
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2016-08-02 16:06:17 +08:00
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bool isBlockInRange(const MachineInstr &MI, const MachineBasicBlock &BB) const;
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2016-08-02 16:30:06 +08:00
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2016-08-02 15:20:09 +08:00
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bool fixupConditionalBranch(MachineInstr &MI);
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2016-10-07 00:20:41 +08:00
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bool fixupUnconditionalBranch(MachineInstr &MI);
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2016-10-06 23:38:53 +08:00
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uint64_t computeBlockSize(const MachineBasicBlock &MBB) const;
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2016-08-02 16:06:17 +08:00
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unsigned getInstrOffset(const MachineInstr &MI) const;
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2014-03-29 18:18:08 +08:00
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void dumpBBs();
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void verify();
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public:
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static char ID;
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BranchRelaxation() : MachineFunctionPass(ID) {}
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2014-03-29 18:18:08 +08:00
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2014-04-29 15:58:25 +08:00
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bool runOnMachineFunction(MachineFunction &MF) override;
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2014-03-29 18:18:08 +08:00
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StringRef getPassName() const override { return BRANCH_RELAX_NAME; }
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};
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2017-09-14 05:15:20 +08:00
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} // end anonymous namespace
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2014-03-29 18:18:08 +08:00
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2016-10-06 23:38:53 +08:00
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char BranchRelaxation::ID = 0;
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2016-10-06 23:38:53 +08:00
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char &llvm::BranchRelaxationPassID = BranchRelaxation::ID;
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INITIALIZE_PASS(BranchRelaxation, DEBUG_TYPE, BRANCH_RELAX_NAME, false, false)
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2015-08-06 00:12:10 +08:00
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2014-03-29 18:18:08 +08:00
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/// verify - check BBOffsets, BBSizes, alignment of islands
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void BranchRelaxation::verify() {
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2014-03-29 18:18:08 +08:00
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#ifndef NDEBUG
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unsigned PrevNum = MF->begin()->getNumber();
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2014-04-16 08:42:46 +08:00
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for (MachineBasicBlock &MBB : *MF) {
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unsigned Align = MBB.getAlignment();
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unsigned Num = MBB.getNumber();
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assert(BlockInfo[Num].Offset % (1u << Align) == 0);
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assert(!Num || BlockInfo[PrevNum].postOffset(MBB) <= BlockInfo[Num].Offset);
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2016-11-03 00:18:29 +08:00
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assert(BlockInfo[Num].Size == computeBlockSize(MBB));
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2014-03-29 18:18:08 +08:00
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PrevNum = Num;
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}
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#endif
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}
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2017-10-15 22:32:27 +08:00
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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2014-03-29 18:18:08 +08:00
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/// print block size and offset information - debugging
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2017-01-28 10:02:38 +08:00
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LLVM_DUMP_METHOD void BranchRelaxation::dumpBBs() {
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2014-04-04 07:43:26 +08:00
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for (auto &MBB : *MF) {
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2014-04-03 02:00:39 +08:00
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const BasicBlockInfo &BBI = BlockInfo[MBB.getNumber()];
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dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset)
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<< format("size=%#x\n", BBI.Size);
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}
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}
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2017-01-28 10:02:38 +08:00
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#endif
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2014-03-29 18:18:08 +08:00
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/// scanFunction - Do the initial scan of the function, building up
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/// information about each block.
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2016-10-06 23:38:53 +08:00
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void BranchRelaxation::scanFunction() {
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2014-03-29 18:18:08 +08:00
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BlockInfo.clear();
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BlockInfo.resize(MF->getNumBlockIDs());
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// First thing, compute the size of all basic blocks, and see if the function
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// has any inline assembly in it. If so, we have to be conservative about
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// alignment assumptions, as we don't know for sure the size of any
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// instructions in the inline assembly.
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2014-04-16 08:42:46 +08:00
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for (MachineBasicBlock &MBB : *MF)
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BlockInfo[MBB.getNumber()].Size = computeBlockSize(MBB);
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2014-03-29 18:18:08 +08:00
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// Compute block offsets and known bits.
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2014-04-16 08:42:46 +08:00
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adjustBlockOffsets(*MF->begin());
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2014-03-29 18:18:08 +08:00
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}
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/// computeBlockSize - Compute the size for MBB.
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uint64_t BranchRelaxation::computeBlockSize(const MachineBasicBlock &MBB) const {
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uint64_t Size = 0;
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2014-04-16 08:42:46 +08:00
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for (const MachineInstr &MI : MBB)
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2016-07-29 00:32:22 +08:00
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Size += TII->getInstSizeInBytes(MI);
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return Size;
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2014-03-29 18:18:08 +08:00
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}
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/// getInstrOffset - Return the current offset of the specified machine
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/// instruction from the start of the function. This offset changes as stuff is
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/// moved around inside the function.
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2016-10-06 23:38:53 +08:00
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unsigned BranchRelaxation::getInstrOffset(const MachineInstr &MI) const {
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const MachineBasicBlock *MBB = MI.getParent();
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2014-03-29 18:18:08 +08:00
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// The offset is composed of two things: the sum of the sizes of all MBB's
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// before this instruction's block, and the offset from the start of the block
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// it is in.
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unsigned Offset = BlockInfo[MBB->getNumber()].Offset;
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// Sum instructions before MI in MBB.
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2016-08-02 16:06:17 +08:00
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for (MachineBasicBlock::const_iterator I = MBB->begin(); &*I != &MI; ++I) {
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2014-03-29 18:18:08 +08:00
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assert(I != MBB->end() && "Didn't find MI in its own basic block?");
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2016-07-29 00:32:22 +08:00
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Offset += TII->getInstSizeInBytes(*I);
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2014-03-29 18:18:08 +08:00
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}
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2016-08-02 15:20:09 +08:00
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2014-03-29 18:18:08 +08:00
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return Offset;
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}
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2016-10-06 23:38:53 +08:00
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void BranchRelaxation::adjustBlockOffsets(MachineBasicBlock &Start) {
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2014-04-16 08:42:46 +08:00
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unsigned PrevNum = Start.getNumber();
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for (auto &MBB : make_range(MachineFunction::iterator(Start), MF->end())) {
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unsigned Num = MBB.getNumber();
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2014-03-29 18:18:08 +08:00
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if (!Num) // block zero is never changed from offset zero.
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continue;
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// Get the offset and known bits at the end of the layout predecessor.
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// Include the alignment of the current block.
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BlockInfo[Num].Offset = BlockInfo[PrevNum].postOffset(MBB);
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2014-03-29 18:18:08 +08:00
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PrevNum = Num;
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}
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}
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2017-09-14 05:15:20 +08:00
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/// Insert a new empty basic block and insert it after \BB
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MachineBasicBlock *BranchRelaxation::createNewBlockAfter(MachineBasicBlock &BB) {
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// Create a new MBB for the code after the OrigBB.
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MachineBasicBlock *NewBB =
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MF->CreateMachineBasicBlock(BB.getBasicBlock());
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MF->insert(++BB.getIterator(), NewBB);
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// Insert an entry into BlockInfo to align it properly with the block numbers.
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BlockInfo.insert(BlockInfo.begin() + NewBB->getNumber(), BasicBlockInfo());
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return NewBB;
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}
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2014-03-29 18:18:08 +08:00
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/// Split the basic block containing MI into two blocks, which are joined by
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/// an unconditional branch. Update data structures and renumber blocks to
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/// account for this change and returns the newly created block.
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2016-11-03 00:18:29 +08:00
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MachineBasicBlock *BranchRelaxation::splitBlockBeforeInstr(MachineInstr &MI,
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MachineBasicBlock *DestBB) {
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2016-08-02 15:20:09 +08:00
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MachineBasicBlock *OrigBB = MI.getParent();
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2014-03-29 18:18:08 +08:00
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// Create a new MBB for the code after the OrigBB.
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MachineBasicBlock *NewBB =
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MF->CreateMachineBasicBlock(OrigBB->getBasicBlock());
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2015-10-14 04:02:15 +08:00
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MF->insert(++OrigBB->getIterator(), NewBB);
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2014-03-29 18:18:08 +08:00
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// Splice the instructions starting with MI over to NewBB.
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2016-08-02 15:20:09 +08:00
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NewBB->splice(NewBB->end(), OrigBB, MI.getIterator(), OrigBB->end());
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2014-03-29 18:18:08 +08:00
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// Add an unconditional branch from OrigBB to NewBB.
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// Note the new unconditional branch is not being recorded.
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// There doesn't seem to be meaningful DebugInfo available; this doesn't
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// correspond to anything in the source.
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2016-09-15 01:23:48 +08:00
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TII->insertUnconditionalBranch(*OrigBB, NewBB, DebugLoc());
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2014-03-29 18:18:08 +08:00
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// Insert an entry into BlockInfo to align it properly with the block numbers.
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BlockInfo.insert(BlockInfo.begin() + NewBB->getNumber(), BasicBlockInfo());
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2016-11-03 00:18:29 +08:00
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NewBB->transferSuccessors(OrigBB);
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OrigBB->addSuccessor(NewBB);
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OrigBB->addSuccessor(DestBB);
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// Cleanup potential unconditional branch to successor block.
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// Note that updateTerminator may change the size of the blocks.
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NewBB->updateTerminator();
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OrigBB->updateTerminator();
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2014-03-29 18:18:08 +08:00
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// Figure out how large the OrigBB is. As the first half of the original
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// block, it cannot contain a tablejump. The size includes
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// the new jump we added. (It should be possible to do this without
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// recounting everything, but it's very confusing, and this is rarely
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// executed.)
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2016-10-06 23:38:53 +08:00
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BlockInfo[OrigBB->getNumber()].Size = computeBlockSize(*OrigBB);
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2014-03-29 18:18:08 +08:00
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2016-10-06 23:38:53 +08:00
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// Figure out how large the NewMBB is. As the second half of the original
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2014-03-29 18:18:08 +08:00
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// block, it may contain a tablejump.
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BlockInfo[NewBB->getNumber()].Size = computeBlockSize(*NewBB);
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2014-03-29 18:18:08 +08:00
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// All BBOffsets following these blocks must be modified.
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2014-04-16 08:42:46 +08:00
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adjustBlockOffsets(*OrigBB);
|
2014-03-29 18:18:08 +08:00
|
|
|
|
2016-12-17 07:55:37 +08:00
|
|
|
// Need to fix live-in lists if we track liveness.
|
|
|
|
if (TRI->trackLivenessAfterRegAlloc(*MF))
|
2017-09-07 04:45:24 +08:00
|
|
|
computeAndAddLiveIns(LiveRegs, *NewBB);
|
2016-12-17 07:55:37 +08:00
|
|
|
|
2014-03-29 18:18:08 +08:00
|
|
|
++NumSplit;
|
|
|
|
|
|
|
|
return NewBB;
|
|
|
|
}
|
|
|
|
|
|
|
|
/// isBlockInRange - Returns true if the distance between specific MI and
|
|
|
|
/// specific BB can fit in MI's displacement field.
|
2016-10-06 23:38:53 +08:00
|
|
|
bool BranchRelaxation::isBlockInRange(
|
2016-08-02 16:06:17 +08:00
|
|
|
const MachineInstr &MI, const MachineBasicBlock &DestBB) const {
|
2016-10-06 23:38:09 +08:00
|
|
|
int64_t BrOffset = getInstrOffset(MI);
|
|
|
|
int64_t DestOffset = BlockInfo[DestBB.getNumber()].Offset;
|
2014-03-29 18:18:08 +08:00
|
|
|
|
2016-10-06 23:38:09 +08:00
|
|
|
if (TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - BrOffset))
|
2016-08-02 16:06:17 +08:00
|
|
|
return true;
|
2014-03-29 18:18:08 +08:00
|
|
|
|
2016-08-02 16:06:17 +08:00
|
|
|
DEBUG(
|
|
|
|
dbgs() << "Out of range branch to destination BB#" << DestBB.getNumber()
|
|
|
|
<< " from BB#" << MI.getParent()->getNumber()
|
|
|
|
<< " to " << DestOffset
|
2016-10-06 23:38:09 +08:00
|
|
|
<< " offset " << DestOffset - BrOffset
|
2016-08-02 16:06:17 +08:00
|
|
|
<< '\t' << MI
|
|
|
|
);
|
2014-03-29 18:18:08 +08:00
|
|
|
|
2016-08-02 16:06:17 +08:00
|
|
|
return false;
|
2014-03-29 18:18:08 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/// fixupConditionalBranch - Fix up a conditional branch whose destination is
|
|
|
|
/// too far away to fit in its displacement field. It is converted to an inverse
|
|
|
|
/// conditional branch + an unconditional branch to the destination.
|
2016-10-06 23:38:53 +08:00
|
|
|
bool BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
|
2016-09-15 01:23:48 +08:00
|
|
|
DebugLoc DL = MI.getDebugLoc();
|
|
|
|
MachineBasicBlock *MBB = MI.getParent();
|
|
|
|
MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
|
|
|
|
SmallVector<MachineOperand, 4> Cond;
|
|
|
|
|
|
|
|
bool Fail = TII->analyzeBranch(*MBB, TBB, FBB, Cond);
|
|
|
|
assert(!Fail && "branches to be relaxed must be analyzable");
|
|
|
|
(void)Fail;
|
2014-03-29 18:18:08 +08:00
|
|
|
|
|
|
|
// Add an unconditional branch to the destination and invert the branch
|
|
|
|
// condition to jump over it:
|
|
|
|
// tbz L1
|
|
|
|
// =>
|
|
|
|
// tbnz L2
|
|
|
|
// b L1
|
|
|
|
// L2:
|
|
|
|
|
2016-09-15 01:23:48 +08:00
|
|
|
if (FBB && isBlockInRange(MI, *FBB)) {
|
|
|
|
// Last MI in the BB is an unconditional branch. We can simply invert the
|
|
|
|
// condition and swap destinations:
|
|
|
|
// beq L1
|
|
|
|
// b L2
|
|
|
|
// =>
|
|
|
|
// bne L2
|
|
|
|
// b L1
|
|
|
|
DEBUG(dbgs() << " Invert condition and swap "
|
|
|
|
"its destination with " << MBB->back());
|
|
|
|
|
2016-09-15 04:43:16 +08:00
|
|
|
TII->reverseBranchCondition(Cond);
|
2016-09-15 01:23:48 +08:00
|
|
|
int OldSize = 0, NewSize = 0;
|
2016-09-15 04:43:16 +08:00
|
|
|
TII->removeBranch(*MBB, &OldSize);
|
2016-09-15 01:24:15 +08:00
|
|
|
TII->insertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize);
|
2016-09-15 01:23:48 +08:00
|
|
|
|
|
|
|
BlockInfo[MBB->getNumber()].Size += (NewSize - OldSize);
|
|
|
|
return true;
|
|
|
|
} else if (FBB) {
|
|
|
|
// We need to split the basic block here to obtain two long-range
|
|
|
|
// unconditional branches.
|
|
|
|
auto &NewBB = *MF->CreateMachineBasicBlock(MBB->getBasicBlock());
|
|
|
|
MF->insert(++MBB->getIterator(), &NewBB);
|
|
|
|
|
|
|
|
// Insert an entry into BlockInfo to align it properly with the block
|
|
|
|
// numbers.
|
|
|
|
BlockInfo.insert(BlockInfo.begin() + NewBB.getNumber(), BasicBlockInfo());
|
2014-03-29 18:18:08 +08:00
|
|
|
|
2016-09-15 01:23:48 +08:00
|
|
|
unsigned &NewBBSize = BlockInfo[NewBB.getNumber()].Size;
|
|
|
|
int NewBrSize;
|
|
|
|
TII->insertUnconditionalBranch(NewBB, FBB, DL, &NewBrSize);
|
|
|
|
NewBBSize += NewBrSize;
|
2014-03-29 18:18:08 +08:00
|
|
|
|
|
|
|
// Update the successor lists according to the transformation to follow.
|
|
|
|
// Do it here since if there's no split, no update is needed.
|
2016-09-15 01:23:48 +08:00
|
|
|
MBB->replaceSuccessor(FBB, &NewBB);
|
|
|
|
NewBB.addSuccessor(FBB);
|
2017-05-27 08:53:48 +08:00
|
|
|
|
|
|
|
// Need to fix live-in lists if we track liveness.
|
|
|
|
if (TRI->trackLivenessAfterRegAlloc(*MF))
|
2017-09-07 04:45:24 +08:00
|
|
|
computeAndAddLiveIns(LiveRegs, NewBB);
|
2014-03-29 18:18:08 +08:00
|
|
|
}
|
2016-08-02 16:06:17 +08:00
|
|
|
|
2016-09-15 01:23:48 +08:00
|
|
|
// We now have an appropriate fall-through block in place (either naturally or
|
|
|
|
// just created), so we can invert the condition.
|
2016-08-02 16:06:17 +08:00
|
|
|
MachineBasicBlock &NextBB = *std::next(MachineFunction::iterator(MBB));
|
2014-03-29 18:18:08 +08:00
|
|
|
|
2016-09-15 01:23:48 +08:00
|
|
|
DEBUG(dbgs() << " Insert B to BB#" << TBB->getNumber()
|
2014-03-29 18:18:08 +08:00
|
|
|
<< ", invert condition and change dest. to BB#"
|
2016-08-02 16:06:17 +08:00
|
|
|
<< NextBB.getNumber() << '\n');
|
2014-03-29 18:18:08 +08:00
|
|
|
|
2016-08-02 16:30:06 +08:00
|
|
|
unsigned &MBBSize = BlockInfo[MBB->getNumber()].Size;
|
|
|
|
|
2014-03-29 18:18:08 +08:00
|
|
|
// Insert a new conditional branch and a new unconditional branch.
|
2016-09-15 01:23:48 +08:00
|
|
|
int RemovedSize = 0;
|
2016-09-15 04:43:16 +08:00
|
|
|
TII->reverseBranchCondition(Cond);
|
|
|
|
TII->removeBranch(*MBB, &RemovedSize);
|
2016-09-15 01:23:48 +08:00
|
|
|
MBBSize -= RemovedSize;
|
|
|
|
|
|
|
|
int AddedSize = 0;
|
2016-09-15 01:24:15 +08:00
|
|
|
TII->insertBranch(*MBB, &NextBB, TBB, Cond, DL, &AddedSize);
|
2016-09-15 01:23:48 +08:00
|
|
|
MBBSize += AddedSize;
|
2014-03-29 18:18:08 +08:00
|
|
|
|
|
|
|
// Finally, keep the block offsets up to date.
|
2014-04-16 08:42:46 +08:00
|
|
|
adjustBlockOffsets(*MBB);
|
2014-03-29 18:18:08 +08:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-10-07 00:20:41 +08:00
|
|
|
bool BranchRelaxation::fixupUnconditionalBranch(MachineInstr &MI) {
|
|
|
|
MachineBasicBlock *MBB = MI.getParent();
|
|
|
|
|
|
|
|
unsigned OldBrSize = TII->getInstSizeInBytes(MI);
|
|
|
|
MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI);
|
|
|
|
|
|
|
|
int64_t DestOffset = BlockInfo[DestBB->getNumber()].Offset;
|
|
|
|
int64_t SrcOffset = getInstrOffset(MI);
|
|
|
|
|
|
|
|
assert(!TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - SrcOffset));
|
|
|
|
|
|
|
|
BlockInfo[MBB->getNumber()].Size -= OldBrSize;
|
|
|
|
|
|
|
|
MachineBasicBlock *BranchBB = MBB;
|
|
|
|
|
|
|
|
// If this was an expanded conditional branch, there is already a single
|
|
|
|
// unconditional branch in a block.
|
|
|
|
if (!MBB->empty()) {
|
|
|
|
BranchBB = createNewBlockAfter(*MBB);
|
|
|
|
|
|
|
|
// Add live outs.
|
|
|
|
for (const MachineBasicBlock *Succ : MBB->successors()) {
|
|
|
|
for (const MachineBasicBlock::RegisterMaskPair &LiveIn : Succ->liveins())
|
|
|
|
BranchBB->addLiveIn(LiveIn);
|
|
|
|
}
|
|
|
|
|
2016-10-12 23:32:04 +08:00
|
|
|
BranchBB->sortUniqueLiveIns();
|
2016-10-07 00:20:41 +08:00
|
|
|
BranchBB->addSuccessor(DestBB);
|
|
|
|
MBB->replaceSuccessor(DestBB, BranchBB);
|
|
|
|
}
|
|
|
|
|
|
|
|
DebugLoc DL = MI.getDebugLoc();
|
|
|
|
MI.eraseFromParent();
|
2016-11-03 00:18:29 +08:00
|
|
|
BlockInfo[BranchBB->getNumber()].Size += TII->insertIndirectBranch(
|
2016-10-07 00:20:41 +08:00
|
|
|
*BranchBB, *DestBB, DL, DestOffset - SrcOffset, RS.get());
|
|
|
|
|
|
|
|
adjustBlockOffsets(*MBB);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-10-06 23:38:53 +08:00
|
|
|
bool BranchRelaxation::relaxBranchInstructions() {
|
2014-03-29 18:18:08 +08:00
|
|
|
bool Changed = false;
|
2016-10-07 00:20:41 +08:00
|
|
|
|
2014-03-29 18:18:08 +08:00
|
|
|
// Relaxing branches involves creating new basic blocks, so re-eval
|
|
|
|
// end() for termination.
|
2016-06-17 05:21:49 +08:00
|
|
|
for (MachineFunction::iterator I = MF->begin(); I != MF->end(); ++I) {
|
|
|
|
MachineBasicBlock &MBB = *I;
|
2016-10-06 23:38:53 +08:00
|
|
|
|
2016-12-17 07:55:37 +08:00
|
|
|
// Empty block?
|
|
|
|
MachineBasicBlock::iterator Last = MBB.getLastNonDebugInstr();
|
|
|
|
if (Last == MBB.end())
|
2016-11-02 02:34:00 +08:00
|
|
|
continue;
|
|
|
|
|
|
|
|
// Expand the unconditional branch first if necessary. If there is a
|
|
|
|
// conditional branch, this will end up changing the branch destination of
|
|
|
|
// it to be over the newly inserted indirect branch block, which may avoid
|
|
|
|
// the need to try expanding the conditional branch first, saving an extra
|
|
|
|
// jump.
|
|
|
|
if (Last->isUnconditionalBranch()) {
|
|
|
|
// Unconditional branch destination might be unanalyzable, assume these
|
|
|
|
// are OK.
|
|
|
|
if (MachineBasicBlock *DestBB = TII->getBranchDestBlock(*Last)) {
|
|
|
|
if (!isBlockInRange(*Last, *DestBB)) {
|
|
|
|
fixupUnconditionalBranch(*Last);
|
|
|
|
++NumUnconditionalRelaxed;
|
|
|
|
Changed = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Loop over the conditional branches.
|
2016-08-23 09:30:30 +08:00
|
|
|
MachineBasicBlock::iterator Next;
|
|
|
|
for (MachineBasicBlock::iterator J = MBB.getFirstTerminator();
|
|
|
|
J != MBB.end(); J = Next) {
|
|
|
|
Next = std::next(J);
|
|
|
|
MachineInstr &MI = *J;
|
|
|
|
|
|
|
|
if (MI.isConditionalBranch()) {
|
2016-10-06 23:38:09 +08:00
|
|
|
MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI);
|
2016-08-23 09:30:30 +08:00
|
|
|
if (!isBlockInRange(MI, *DestBB)) {
|
|
|
|
if (Next != MBB.end() && Next->isConditionalBranch()) {
|
|
|
|
// If there are multiple conditional branches, this isn't an
|
|
|
|
// analyzable block. Split later terminators into a new block so
|
|
|
|
// each one will be analyzable.
|
|
|
|
|
2016-11-03 00:18:29 +08:00
|
|
|
splitBlockBeforeInstr(*Next, DestBB);
|
2016-08-23 09:30:30 +08:00
|
|
|
} else {
|
|
|
|
fixupConditionalBranch(MI);
|
|
|
|
++NumConditionalRelaxed;
|
|
|
|
}
|
|
|
|
|
|
|
|
Changed = true;
|
|
|
|
|
|
|
|
// This may have modified all of the terminators, so start over.
|
|
|
|
Next = MBB.getFirstTerminator();
|
|
|
|
}
|
|
|
|
}
|
2014-03-29 18:18:08 +08:00
|
|
|
}
|
|
|
|
}
|
2016-08-23 09:30:30 +08:00
|
|
|
|
2014-03-29 18:18:08 +08:00
|
|
|
return Changed;
|
|
|
|
}
|
|
|
|
|
2016-10-06 23:38:53 +08:00
|
|
|
bool BranchRelaxation::runOnMachineFunction(MachineFunction &mf) {
|
2014-03-29 18:18:08 +08:00
|
|
|
MF = &mf;
|
|
|
|
|
2016-10-06 23:38:53 +08:00
|
|
|
DEBUG(dbgs() << "***** BranchRelaxation *****\n");
|
2014-03-29 18:18:08 +08:00
|
|
|
|
2016-10-07 00:20:41 +08:00
|
|
|
const TargetSubtargetInfo &ST = MF->getSubtarget();
|
|
|
|
TII = ST.getInstrInfo();
|
|
|
|
|
2016-12-17 07:55:37 +08:00
|
|
|
TRI = ST.getRegisterInfo();
|
2016-10-07 00:20:41 +08:00
|
|
|
if (TRI->trackLivenessAfterRegAlloc(*MF))
|
|
|
|
RS.reset(new RegScavenger());
|
2014-03-29 18:18:08 +08:00
|
|
|
|
|
|
|
// Renumber all of the machine basic blocks in the function, guaranteeing that
|
|
|
|
// the numbers agree with the position of the block in the function.
|
|
|
|
MF->RenumberBlocks();
|
|
|
|
|
|
|
|
// Do the initial scan of the function, building up information about the
|
|
|
|
// sizes of each block.
|
|
|
|
scanFunction();
|
|
|
|
|
2016-08-02 16:06:17 +08:00
|
|
|
DEBUG(dbgs() << " Basic blocks before relaxation\n"; dumpBBs(););
|
2014-03-29 18:18:08 +08:00
|
|
|
|
|
|
|
bool MadeChange = false;
|
|
|
|
while (relaxBranchInstructions())
|
|
|
|
MadeChange = true;
|
|
|
|
|
|
|
|
// After a while, this might be made debug-only, but it is not expensive.
|
|
|
|
verify();
|
|
|
|
|
2016-08-02 16:06:17 +08:00
|
|
|
DEBUG(dbgs() << " Basic blocks after relaxation\n\n"; dumpBBs());
|
2014-03-29 18:18:08 +08:00
|
|
|
|
|
|
|
BlockInfo.clear();
|
|
|
|
|
|
|
|
return MadeChange;
|
|
|
|
}
|