2017-01-17 23:02:01 +08:00
|
|
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE
|
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
|
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
|
2017-01-18 01:33:18 +08:00
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512
|
2017-01-17 23:02:01 +08:00
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i64 @test_v2f64_sext(<2 x double> %a0, <2 x double> %a1) {
|
|
|
|
; SSE-LABEL: test_v2f64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: cmpltpd %xmm0, %xmm1
|
|
|
|
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
|
|
|
|
; SSE-NEXT: por %xmm1, %xmm0
|
2017-04-26 15:08:44 +08:00
|
|
|
; SSE-NEXT: movq %xmm0, %rax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v2f64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0
|
|
|
|
; AVX-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
|
|
|
|
; AVX-NEXT: vorpd %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX-NEXT: vmovq %xmm0, %rax
|
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v2f64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovq %xmm0, %rax
|
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = fcmp ogt <2 x double> %a0, %a1
|
|
|
|
%s = sext <2 x i1> %c to <2 x i64>
|
|
|
|
%1 = shufflevector <2 x i64> %s, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
|
|
|
|
%2 = or <2 x i64> %s, %1
|
|
|
|
%3 = extractelement <2 x i64> %2, i32 0
|
|
|
|
ret i64 %3
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i64 @test_v4f64_sext(<4 x double> %a0, <4 x double> %a1) {
|
|
|
|
; SSE-LABEL: test_v4f64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: cmpltpd %xmm1, %xmm3
|
|
|
|
; SSE-NEXT: cmpltpd %xmm0, %xmm2
|
|
|
|
; SSE-NEXT: orpd %xmm3, %xmm2
|
|
|
|
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
|
|
|
|
; SSE-NEXT: por %xmm2, %xmm0
|
2017-04-26 15:08:44 +08:00
|
|
|
; SSE-NEXT: movq %xmm0, %rax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v4f64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
|
|
|
|
; AVX-NEXT: vmovmskpd %ymm0, %eax
|
|
|
|
; AVX-NEXT: negl %eax
|
|
|
|
; AVX-NEXT: sbbq %rax, %rax
|
|
|
|
; AVX-NEXT: vzeroupper
|
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v4f64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
|
|
|
|
; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vmovq %xmm0, %rax
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = fcmp ogt <4 x double> %a0, %a1
|
|
|
|
%s = sext <4 x i1> %c to <4 x i64>
|
|
|
|
%1 = shufflevector <4 x i64> %s, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
|
|
|
|
%2 = or <4 x i64> %s, %1
|
|
|
|
%3 = shufflevector <4 x i64> %2, <4 x i64> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <4 x i64> %2, %3
|
|
|
|
%5 = extractelement <4 x i64> %4, i64 0
|
|
|
|
ret i64 %5
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i64 @test_v4f64_legal_sext(<4 x double> %a0, <4 x double> %a1) {
|
|
|
|
; SSE-LABEL: test_v4f64_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: cmpltpd %xmm1, %xmm3
|
|
|
|
; SSE-NEXT: cmpltpd %xmm0, %xmm2
|
2017-10-24 23:38:16 +08:00
|
|
|
; SSE-NEXT: packssdw %xmm3, %xmm2
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: movmskps %xmm2, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: cltq
|
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v4f64_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
|
|
|
|
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
|
2017-10-24 23:38:16 +08:00
|
|
|
; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX-NEXT: vmovmskps %xmm0, %eax
|
|
|
|
; AVX-NEXT: negl %eax
|
|
|
|
; AVX-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: cltq
|
|
|
|
; AVX-NEXT: vzeroupper
|
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v4f64_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %k1
|
|
|
|
; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
|
|
|
; AVX512-NEXT: cltq
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = fcmp ogt <4 x double> %a0, %a1
|
|
|
|
%s = sext <4 x i1> %c to <4 x i32>
|
|
|
|
%1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
|
|
|
|
%2 = or <4 x i32> %s, %1
|
|
|
|
%3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <4 x i32> %2, %3
|
|
|
|
%5 = extractelement <4 x i32> %4, i64 0
|
|
|
|
%6 = sext i32 %5 to i64
|
|
|
|
ret i64 %6
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i32 @test_v4f32_sext(<4 x float> %a0, <4 x float> %a1) {
|
|
|
|
; SSE-LABEL: test_v4f32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: cmpltps %xmm0, %xmm1
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: movmskps %xmm1, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v4f32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX-NEXT: vmovmskps %xmm0, %eax
|
|
|
|
; AVX-NEXT: negl %eax
|
|
|
|
; AVX-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v4f32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = fcmp ogt <4 x float> %a0, %a1
|
|
|
|
%s = sext <4 x i1> %c to <4 x i32>
|
|
|
|
%1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
|
|
|
|
%2 = or <4 x i32> %s, %1
|
|
|
|
%3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <4 x i32> %2, %3
|
|
|
|
%5 = extractelement <4 x i32> %4, i32 0
|
|
|
|
ret i32 %5
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i32 @test_v8f32_sext(<8 x float> %a0, <8 x float> %a1) {
|
|
|
|
; SSE-LABEL: test_v8f32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: cmpltps %xmm1, %xmm3
|
|
|
|
; SSE-NEXT: cmpltps %xmm0, %xmm2
|
|
|
|
; SSE-NEXT: orps %xmm3, %xmm2
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: movmskps %xmm2, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v8f32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
|
|
|
|
; AVX-NEXT: vmovmskps %ymm0, %eax
|
|
|
|
; AVX-NEXT: negl %eax
|
|
|
|
; AVX-NEXT: sbbl %eax, %eax
|
|
|
|
; AVX-NEXT: vzeroupper
|
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v8f32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
|
|
|
|
; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = fcmp ogt <8 x float> %a0, %a1
|
|
|
|
%s = sext <8 x i1> %c to <8 x i32>
|
|
|
|
%1 = shufflevector <8 x i32> %s, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%2 = or <8 x i32> %s, %1
|
|
|
|
%3 = shufflevector <8 x i32> %2, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <8 x i32> %2, %3
|
|
|
|
%5 = shufflevector <8 x i32> %4, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%6 = or <8 x i32> %4, %5
|
|
|
|
%7 = extractelement <8 x i32> %6, i32 0
|
|
|
|
ret i32 %7
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i32 @test_v8f32_legal_sext(<8 x float> %a0, <8 x float> %a1) {
|
|
|
|
; SSE-LABEL: test_v8f32_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: cmpltps %xmm1, %xmm3
|
|
|
|
; SSE-NEXT: cmpltps %xmm0, %xmm2
|
2017-10-24 23:38:16 +08:00
|
|
|
; SSE-NEXT: packssdw %xmm3, %xmm2
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: pmovmskb %xmm2, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v8f32_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
|
|
|
|
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
|
2017-10-24 23:38:16 +08:00
|
|
|
; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX-NEXT: vpmovmskb %xmm0, %eax
|
|
|
|
; AVX-NEXT: negl %eax
|
|
|
|
; AVX-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: vzeroupper
|
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v8f32_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %k0
|
|
|
|
; AVX512-NEXT: vpmovm2w %k0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
|
|
|
; AVX512-NEXT: cwtl
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = fcmp ogt <8 x float> %a0, %a1
|
|
|
|
%s = sext <8 x i1> %c to <8 x i16>
|
|
|
|
%1 = shufflevector <8 x i16> %s, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%2 = or <8 x i16> %s, %1
|
|
|
|
%3 = shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <8 x i16> %2, %3
|
|
|
|
%5 = shufflevector <8 x i16> %4, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%6 = or <8 x i16> %4, %5
|
|
|
|
%7 = extractelement <8 x i16> %6, i32 0
|
|
|
|
%8 = sext i16 %7 to i32
|
|
|
|
ret i32 %8
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i64 @test_v2i64_sext(<2 x i64> %a0, <2 x i64> %a1) {
|
|
|
|
; SSE-LABEL: test_v2i64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtq %xmm1, %xmm0
|
|
|
|
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; SSE-NEXT: por %xmm0, %xmm1
|
2017-04-26 15:08:44 +08:00
|
|
|
; SSE-NEXT: movq %xmm1, %rax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v2i64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX-NEXT: vmovq %xmm0, %rax
|
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v2i64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovq %xmm0, %rax
|
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <2 x i64> %a0, %a1
|
|
|
|
%s = sext <2 x i1> %c to <2 x i64>
|
|
|
|
%1 = shufflevector <2 x i64> %s, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
|
|
|
|
%2 = or <2 x i64> %s, %1
|
|
|
|
%3 = extractelement <2 x i64> %2, i32 0
|
|
|
|
ret i64 %3
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i64 @test_v4i64_sext(<4 x i64> %a0, <4 x i64> %a1) {
|
|
|
|
; SSE-LABEL: test_v4i64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtq %xmm3, %xmm1
|
|
|
|
; SSE-NEXT: pcmpgtq %xmm2, %xmm0
|
|
|
|
; SSE-NEXT: por %xmm1, %xmm0
|
|
|
|
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; SSE-NEXT: por %xmm0, %xmm1
|
2017-04-26 15:08:44 +08:00
|
|
|
; SSE-NEXT: movq %xmm1, %rax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX1-LABEL: test_v4i64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX1: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
|
|
|
|
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2
|
|
|
|
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX1-NEXT: vmovmskpd %ymm0, %eax
|
|
|
|
; AVX1-NEXT: negl %eax
|
|
|
|
; AVX1-NEXT: sbbq %rax, %rax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vzeroupper
|
|
|
|
; AVX1-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX2-LABEL: test_v4i64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX2: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX2-NEXT: vmovmskpd %ymm0, %eax
|
|
|
|
; AVX2-NEXT: negl %eax
|
|
|
|
; AVX2-NEXT: sbbq %rax, %rax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vzeroupper
|
|
|
|
; AVX2-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v4i64_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vmovq %xmm0, %rax
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <4 x i64> %a0, %a1
|
|
|
|
%s = sext <4 x i1> %c to <4 x i64>
|
|
|
|
%1 = shufflevector <4 x i64> %s, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
|
|
|
|
%2 = or <4 x i64> %s, %1
|
|
|
|
%3 = shufflevector <4 x i64> %2, <4 x i64> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <4 x i64> %2, %3
|
|
|
|
%5 = extractelement <4 x i64> %4, i64 0
|
|
|
|
ret i64 %5
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i64 @test_v4i64_legal_sext(<4 x i64> %a0, <4 x i64> %a1) {
|
|
|
|
; SSE-LABEL: test_v4i64_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtq %xmm3, %xmm1
|
|
|
|
; SSE-NEXT: pcmpgtq %xmm2, %xmm0
|
2017-10-24 23:38:16 +08:00
|
|
|
; SSE-NEXT: packssdw %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: movmskps %xmm0, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: cltq
|
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX1-LABEL: test_v4i64_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX1: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
|
|
|
|
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2
|
|
|
|
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
|
2017-10-24 23:38:16 +08:00
|
|
|
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX1-NEXT: vmovmskps %xmm0, %eax
|
|
|
|
; AVX1-NEXT: negl %eax
|
|
|
|
; AVX1-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: cltq
|
|
|
|
; AVX1-NEXT: vzeroupper
|
|
|
|
; AVX1-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX2-LABEL: test_v4i64_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX2: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
2017-10-24 23:38:16 +08:00
|
|
|
; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX2-NEXT: vmovmskps %xmm0, %eax
|
|
|
|
; AVX2-NEXT: negl %eax
|
|
|
|
; AVX2-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: cltq
|
|
|
|
; AVX2-NEXT: vzeroupper
|
|
|
|
; AVX2-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v4i64_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %k1
|
|
|
|
; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
|
|
|
; AVX512-NEXT: cltq
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <4 x i64> %a0, %a1
|
|
|
|
%s = sext <4 x i1> %c to <4 x i32>
|
|
|
|
%1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
|
|
|
|
%2 = or <4 x i32> %s, %1
|
|
|
|
%3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <4 x i32> %2, %3
|
|
|
|
%5 = extractelement <4 x i32> %4, i64 0
|
|
|
|
%6 = sext i32 %5 to i64
|
|
|
|
ret i64 %6
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i32 @test_v4i32_sext(<4 x i32> %a0, <4 x i32> %a1) {
|
|
|
|
; SSE-LABEL: test_v4i32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtd %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: movmskps %xmm0, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v4i32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX-NEXT: vmovmskps %xmm0, %eax
|
|
|
|
; AVX-NEXT: negl %eax
|
|
|
|
; AVX-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v4i32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <4 x i32> %a0, %a1
|
|
|
|
%s = sext <4 x i1> %c to <4 x i32>
|
|
|
|
%1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
|
|
|
|
%2 = or <4 x i32> %s, %1
|
|
|
|
%3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <4 x i32> %2, %3
|
|
|
|
%5 = extractelement <4 x i32> %4, i32 0
|
|
|
|
ret i32 %5
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i32 @test_v8i32_sext(<8 x i32> %a0, <8 x i32> %a1) {
|
|
|
|
; SSE-LABEL: test_v8i32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtd %xmm3, %xmm1
|
|
|
|
; SSE-NEXT: pcmpgtd %xmm2, %xmm0
|
|
|
|
; SSE-NEXT: por %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: movmskps %xmm0, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX1-LABEL: test_v8i32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX1: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
|
|
|
|
; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
|
|
|
|
; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX1-NEXT: vmovmskps %ymm0, %eax
|
|
|
|
; AVX1-NEXT: negl %eax
|
|
|
|
; AVX1-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vzeroupper
|
|
|
|
; AVX1-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX2-LABEL: test_v8i32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX2: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX2-NEXT: vmovmskps %ymm0, %eax
|
|
|
|
; AVX2-NEXT: negl %eax
|
|
|
|
; AVX2-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vzeroupper
|
|
|
|
; AVX2-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v8i32_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <8 x i32> %a0, %a1
|
|
|
|
%s = sext <8 x i1> %c to <8 x i32>
|
|
|
|
%1 = shufflevector <8 x i32> %s, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%2 = or <8 x i32> %s, %1
|
|
|
|
%3 = shufflevector <8 x i32> %2, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <8 x i32> %2, %3
|
|
|
|
%5 = shufflevector <8 x i32> %4, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%6 = or <8 x i32> %4, %5
|
|
|
|
%7 = extractelement <8 x i32> %6, i32 0
|
|
|
|
ret i32 %7
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i32 @test_v8i32_legal_sext(<8 x i32> %a0, <8 x i32> %a1) {
|
|
|
|
; SSE-LABEL: test_v8i32_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtd %xmm3, %xmm1
|
|
|
|
; SSE-NEXT: pcmpgtd %xmm2, %xmm0
|
2017-10-24 23:38:16 +08:00
|
|
|
; SSE-NEXT: packssdw %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: pmovmskb %xmm0, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX1-LABEL: test_v8i32_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX1: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
|
|
|
|
; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
|
|
|
|
; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
|
2017-10-24 23:38:16 +08:00
|
|
|
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX1-NEXT: vpmovmskb %xmm0, %eax
|
|
|
|
; AVX1-NEXT: negl %eax
|
|
|
|
; AVX1-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vzeroupper
|
|
|
|
; AVX1-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX2-LABEL: test_v8i32_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX2: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
2017-10-24 23:38:16 +08:00
|
|
|
; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX2-NEXT: vpmovmskb %xmm0, %eax
|
|
|
|
; AVX2-NEXT: negl %eax
|
|
|
|
; AVX2-NEXT: sbbl %eax, %eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vzeroupper
|
|
|
|
; AVX2-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v8i32_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
|
|
|
|
; AVX512-NEXT: vpmovm2w %k0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
|
|
|
; AVX512-NEXT: cwtl
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <8 x i32> %a0, %a1
|
|
|
|
%s = sext <8 x i1> %c to <8 x i16>
|
|
|
|
%1 = shufflevector <8 x i16> %s, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%2 = or <8 x i16> %s, %1
|
|
|
|
%3 = shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <8 x i16> %2, %3
|
|
|
|
%5 = shufflevector <8 x i16> %4, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%6 = or <8 x i16> %4, %5
|
|
|
|
%7 = extractelement <8 x i16> %6, i32 0
|
|
|
|
%8 = sext i16 %7 to i32
|
|
|
|
ret i32 %8
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i16 @test_v8i16_sext(<8 x i16> %a0, <8 x i16> %a1) {
|
|
|
|
; SSE-LABEL: test_v8i16_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtw %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: pmovmskb %xmm0, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v8i16_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX-NEXT: vpmovmskb %xmm0, %eax
|
|
|
|
; AVX-NEXT: negl %eax
|
|
|
|
; AVX-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v8i16_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <8 x i16> %a0, %a1
|
|
|
|
%s = sext <8 x i1> %c to <8 x i16>
|
|
|
|
%1 = shufflevector <8 x i16> %s, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%2 = or <8 x i16> %s, %1
|
|
|
|
%3 = shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <8 x i16> %2, %3
|
|
|
|
%5 = shufflevector <8 x i16> %4, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%6 = or <8 x i16> %4, %5
|
|
|
|
%7 = extractelement <8 x i16> %6, i32 0
|
|
|
|
ret i16 %7
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i16 @test_v16i16_sext(<16 x i16> %a0, <16 x i16> %a1) {
|
|
|
|
; SSE-LABEL: test_v16i16_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtw %xmm3, %xmm1
|
|
|
|
; SSE-NEXT: pcmpgtw %xmm2, %xmm0
|
|
|
|
; SSE-NEXT: por %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: pmovmskb %xmm0, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX1-LABEL: test_v16i16_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX1: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
|
|
|
|
; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
|
|
|
|
; AVX1-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
|
|
|
|
; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0
|
2017-09-18 11:29:47 +08:00
|
|
|
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
|
2017-09-18 11:29:47 +08:00
|
|
|
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
|
|
|
|
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX1-NEXT: vmovd %xmm0, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vzeroupper
|
|
|
|
; AVX1-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX2-LABEL: test_v16i16_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX2: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX2-NEXT: vpmovmskb %ymm0, %eax
|
|
|
|
; AVX2-NEXT: negl %eax
|
|
|
|
; AVX2-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vzeroupper
|
|
|
|
; AVX2-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v16i16_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vmovd %xmm0, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <16 x i16> %a0, %a1
|
|
|
|
%s = sext <16 x i1> %c to <16 x i16>
|
|
|
|
%1 = shufflevector <16 x i16> %s, <16 x i16> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%2 = or <16 x i16> %s, %1
|
|
|
|
%3 = shufflevector <16 x i16> %2, <16 x i16> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <16 x i16> %2, %3
|
|
|
|
%5 = shufflevector <16 x i16> %4, <16 x i16> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%6 = or <16 x i16> %4, %5
|
|
|
|
%7 = shufflevector <16 x i16> %6, <16 x i16> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%8 = or <16 x i16> %6, %7
|
|
|
|
%9 = extractelement <16 x i16> %8, i32 0
|
|
|
|
ret i16 %9
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i16 @test_v16i16_legal_sext(<16 x i16> %a0, <16 x i16> %a1) {
|
|
|
|
; SSE-LABEL: test_v16i16_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtw %xmm3, %xmm1
|
|
|
|
; SSE-NEXT: pcmpgtw %xmm2, %xmm0
|
|
|
|
; SSE-NEXT: packsswb %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: pmovmskb %xmm0, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX1-LABEL: test_v16i16_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX1: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
|
|
|
|
; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
|
|
|
|
; AVX1-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX1-NEXT: vpmovmskb %xmm0, %eax
|
|
|
|
; AVX1-NEXT: negl %eax
|
|
|
|
; AVX1-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vzeroupper
|
|
|
|
; AVX1-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX2-LABEL: test_v16i16_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX2: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
|
|
|
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX2-NEXT: vpmovmskb %xmm0, %eax
|
|
|
|
; AVX2-NEXT: negl %eax
|
|
|
|
; AVX2-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vzeroupper
|
|
|
|
; AVX2-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v16i16_legal_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %k0
|
|
|
|
; AVX512-NEXT: vpmovm2b %k0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
|
|
|
|
; AVX512-NEXT: movsbl %al, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <16 x i16> %a0, %a1
|
|
|
|
%s = sext <16 x i1> %c to <16 x i8>
|
|
|
|
%1 = shufflevector <16 x i8> %s, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%2 = or <16 x i8> %s, %1
|
|
|
|
%3 = shufflevector <16 x i8> %2, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <16 x i8> %2, %3
|
|
|
|
%5 = shufflevector <16 x i8> %4, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%6 = or <16 x i8> %4, %5
|
|
|
|
%7 = shufflevector <16 x i8> %6, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%8 = or <16 x i8> %6, %7
|
|
|
|
%9 = extractelement <16 x i8> %8, i32 0
|
|
|
|
%10 = sext i8 %9 to i16
|
|
|
|
ret i16 %10
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i8 @test_v16i8_sext(<16 x i8> %a0, <16 x i8> %a1) {
|
|
|
|
; SSE-LABEL: test_v16i8_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtb %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: pmovmskb %xmm0, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; SSE-NEXT: # kill: def $al killed $al killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX-LABEL: test_v16i8_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX-NEXT: vpmovmskb %xmm0, %eax
|
|
|
|
; AVX-NEXT: negl %eax
|
|
|
|
; AVX-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX-NEXT: # kill: def $al killed $al killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v16i8_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX512-NEXT: # kill: def $al killed $al killed $eax
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <16 x i8> %a0, %a1
|
|
|
|
%s = sext <16 x i1> %c to <16 x i8>
|
|
|
|
%1 = shufflevector <16 x i8> %s, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%2 = or <16 x i8> %s, %1
|
|
|
|
%3 = shufflevector <16 x i8> %2, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <16 x i8> %2, %3
|
|
|
|
%5 = shufflevector <16 x i8> %4, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%6 = or <16 x i8> %4, %5
|
|
|
|
%7 = shufflevector <16 x i8> %6, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%8 = or <16 x i8> %6, %7
|
|
|
|
%9 = extractelement <16 x i8> %8, i32 0
|
|
|
|
ret i8 %9
|
|
|
|
}
|
|
|
|
|
2017-02-04 01:31:01 +08:00
|
|
|
define i8 @test_v32i8_sext(<32 x i8> %a0, <32 x i8> %a1) {
|
|
|
|
; SSE-LABEL: test_v32i8_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; SSE: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: pcmpgtb %xmm3, %xmm1
|
|
|
|
; SSE-NEXT: pcmpgtb %xmm2, %xmm0
|
|
|
|
; SSE-NEXT: por %xmm1, %xmm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; SSE-NEXT: pmovmskb %xmm0, %eax
|
|
|
|
; SSE-NEXT: negl %eax
|
|
|
|
; SSE-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; SSE-NEXT: # kill: def $al killed $al killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; SSE-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX1-LABEL: test_v32i8_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX1: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
|
|
|
|
; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2
|
|
|
|
; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
|
|
|
|
; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0
|
2017-09-18 11:29:47 +08:00
|
|
|
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
|
2017-09-18 11:29:47 +08:00
|
|
|
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
|
|
|
|
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
|
|
|
|
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX1-NEXT: vpextrb $0, %xmm0, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX1-NEXT: # kill: def $al killed $al killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX1-NEXT: vzeroupper
|
|
|
|
; AVX1-NEXT: retq
|
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX2-LABEL: test_v32i8_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX2: # %bb.0:
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
|
2017-02-02 19:52:33 +08:00
|
|
|
; AVX2-NEXT: vpmovmskb %ymm0, %eax
|
|
|
|
; AVX2-NEXT: negl %eax
|
|
|
|
; AVX2-NEXT: sbbl %eax, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX2-NEXT: # kill: def $al killed $al killed $eax
|
2017-01-17 23:02:01 +08:00
|
|
|
; AVX2-NEXT: vzeroupper
|
|
|
|
; AVX2-NEXT: retq
|
2017-01-18 01:33:18 +08:00
|
|
|
;
|
2017-02-04 01:31:01 +08:00
|
|
|
; AVX512-LABEL: test_v32i8_sext:
|
2017-12-05 01:18:51 +08:00
|
|
|
; AVX512: # %bb.0:
|
2018-01-10 02:14:22 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
|
|
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
|
|
|
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
|
2018-02-01 06:04:26 +08:00
|
|
|
; AVX512-NEXT: # kill: def $al killed $al killed $eax
|
2017-03-03 17:03:24 +08:00
|
|
|
; AVX512-NEXT: vzeroupper
|
2017-01-18 01:33:18 +08:00
|
|
|
; AVX512-NEXT: retq
|
2017-01-17 23:02:01 +08:00
|
|
|
%c = icmp sgt <32 x i8> %a0, %a1
|
|
|
|
%s = sext <32 x i1> %c to <32 x i8>
|
|
|
|
%1 = shufflevector <32 x i8> %s, <32 x i8> undef, <32 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%2 = or <32 x i8> %s, %1
|
|
|
|
%3 = shufflevector <32 x i8> %2, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%4 = or <32 x i8> %2, %3
|
|
|
|
%5 = shufflevector <32 x i8> %4, <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%6 = or <32 x i8> %4, %5
|
|
|
|
%7 = shufflevector <32 x i8> %6, <32 x i8> undef, <32 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%8 = or <32 x i8> %6, %7
|
|
|
|
%9 = shufflevector <32 x i8> %8, <32 x i8> undef, <32 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
|
|
%10 = or <32 x i8> %8, %9
|
|
|
|
%11 = extractelement <32 x i8> %10, i32 0
|
|
|
|
ret i8 %11
|
|
|
|
}
|