[SystemZ] Add CodeGen support for integer vector types
This the first of a series of patches to add CodeGen support exploiting
the instructions of the z13 vector facility. This patch adds support
for the native integer vector types (v16i8, v8i16, v4i32, v2i64).
When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
(except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.
The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.
However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.
These alignment rules are not only implemented at the C language level
(implemented in clang), but also at the LLVM IR level. This is done
by selecting a different DataLayout string depending on whether the
vector ABI is in effect or not.
Based on a patch by Richard Sandiford.
llvm-svn: 236521
2015-05-06 03:25:42 +08:00
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; Test replications of a scalar memory value, represented as splats.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test a v16i8 replicating load with no offset.
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define <16 x i8> @f1(i8 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: vlrepb %v24, 0(%r2)
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; CHECK: br %r14
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%scalar = load i8, i8 *%ptr
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%val = insertelement <16 x i8> undef, i8 %scalar, i32 0
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%ret = shufflevector <16 x i8> %val, <16 x i8> undef,
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<16 x i32> zeroinitializer
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ret <16 x i8> %ret
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}
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; Test a v16i8 replicating load with the maximum in-range offset.
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define <16 x i8> @f2(i8 *%base) {
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; CHECK-LABEL: f2:
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; CHECK: vlrepb %v24, 4095(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%base, i64 4095
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%scalar = load i8, i8 *%ptr
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%val = insertelement <16 x i8> undef, i8 %scalar, i32 0
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%ret = shufflevector <16 x i8> %val, <16 x i8> undef,
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<16 x i32> zeroinitializer
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ret <16 x i8> %ret
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}
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; Test a v16i8 replicating load with the first out-of-range offset.
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define <16 x i8> @f3(i8 *%base) {
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; CHECK-LABEL: f3:
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; CHECK: aghi %r2, 4096
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; CHECK: vlrepb %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%base, i64 4096
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%scalar = load i8, i8 *%ptr
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%val = insertelement <16 x i8> undef, i8 %scalar, i32 0
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%ret = shufflevector <16 x i8> %val, <16 x i8> undef,
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<16 x i32> zeroinitializer
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ret <16 x i8> %ret
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}
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; Test a v8i16 replicating load with no offset.
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define <8 x i16> @f4(i16 *%ptr) {
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; CHECK-LABEL: f4:
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; CHECK: vlreph %v24, 0(%r2)
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; CHECK: br %r14
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%scalar = load i16, i16 *%ptr
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%val = insertelement <8 x i16> undef, i16 %scalar, i32 0
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%ret = shufflevector <8 x i16> %val, <8 x i16> undef,
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<8 x i32> zeroinitializer
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ret <8 x i16> %ret
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}
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; Test a v8i16 replicating load with the maximum in-range offset.
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define <8 x i16> @f5(i16 *%base) {
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; CHECK-LABEL: f5:
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; CHECK: vlreph %v24, 4094(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16, i16 *%base, i64 2047
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%scalar = load i16, i16 *%ptr
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%val = insertelement <8 x i16> undef, i16 %scalar, i32 0
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%ret = shufflevector <8 x i16> %val, <8 x i16> undef,
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<8 x i32> zeroinitializer
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ret <8 x i16> %ret
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}
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; Test a v8i16 replicating load with the first out-of-range offset.
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define <8 x i16> @f6(i16 *%base) {
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; CHECK-LABEL: f6:
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; CHECK: aghi %r2, 4096
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; CHECK: vlreph %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16, i16 *%base, i64 2048
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%scalar = load i16, i16 *%ptr
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%val = insertelement <8 x i16> undef, i16 %scalar, i32 0
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%ret = shufflevector <8 x i16> %val, <8 x i16> undef,
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<8 x i32> zeroinitializer
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ret <8 x i16> %ret
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}
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; Test a v4i32 replicating load with no offset.
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define <4 x i32> @f7(i32 *%ptr) {
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; CHECK-LABEL: f7:
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; CHECK: vlrepf %v24, 0(%r2)
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; CHECK: br %r14
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%scalar = load i32, i32 *%ptr
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%val = insertelement <4 x i32> undef, i32 %scalar, i32 0
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%ret = shufflevector <4 x i32> %val, <4 x i32> undef,
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<4 x i32> zeroinitializer
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ret <4 x i32> %ret
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}
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; Test a v4i32 replicating load with the maximum in-range offset.
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define <4 x i32> @f8(i32 *%base) {
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; CHECK-LABEL: f8:
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; CHECK: vlrepf %v24, 4092(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i32, i32 *%base, i64 1023
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%scalar = load i32, i32 *%ptr
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%val = insertelement <4 x i32> undef, i32 %scalar, i32 0
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%ret = shufflevector <4 x i32> %val, <4 x i32> undef,
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<4 x i32> zeroinitializer
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ret <4 x i32> %ret
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}
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; Test a v4i32 replicating load with the first out-of-range offset.
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define <4 x i32> @f9(i32 *%base) {
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; CHECK-LABEL: f9:
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; CHECK: aghi %r2, 4096
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; CHECK: vlrepf %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i32, i32 *%base, i64 1024
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%scalar = load i32, i32 *%ptr
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%val = insertelement <4 x i32> undef, i32 %scalar, i32 0
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%ret = shufflevector <4 x i32> %val, <4 x i32> undef,
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<4 x i32> zeroinitializer
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ret <4 x i32> %ret
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}
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; Test a v2i64 replicating load with no offset.
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define <2 x i64> @f10(i64 *%ptr) {
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; CHECK-LABEL: f10:
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; CHECK: vlrepg %v24, 0(%r2)
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; CHECK: br %r14
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%scalar = load i64, i64 *%ptr
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%val = insertelement <2 x i64> undef, i64 %scalar, i32 0
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%ret = shufflevector <2 x i64> %val, <2 x i64> undef,
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<2 x i32> zeroinitializer
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ret <2 x i64> %ret
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}
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; Test a v2i64 replicating load with the maximum in-range offset.
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define <2 x i64> @f11(i64 *%base) {
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; CHECK-LABEL: f11:
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; CHECK: vlrepg %v24, 4088(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%base, i32 511
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%scalar = load i64, i64 *%ptr
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%val = insertelement <2 x i64> undef, i64 %scalar, i32 0
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%ret = shufflevector <2 x i64> %val, <2 x i64> undef,
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<2 x i32> zeroinitializer
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ret <2 x i64> %ret
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}
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; Test a v2i64 replicating load with the first out-of-range offset.
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define <2 x i64> @f12(i64 *%base) {
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; CHECK-LABEL: f12:
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; CHECK: aghi %r2, 4096
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; CHECK: vlrepg %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%base, i32 512
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%scalar = load i64, i64 *%ptr
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%val = insertelement <2 x i64> undef, i64 %scalar, i32 0
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%ret = shufflevector <2 x i64> %val, <2 x i64> undef,
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<2 x i32> zeroinitializer
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ret <2 x i64> %ret
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}
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2015-05-06 03:27:45 +08:00
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; Test a v4f32 replicating load with no offset.
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define <4 x float> @f13(float *%ptr) {
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; CHECK-LABEL: f13:
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; CHECK: vlrepf %v24, 0(%r2)
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; CHECK: br %r14
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%scalar = load float, float *%ptr
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%val = insertelement <4 x float> undef, float %scalar, i32 0
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%ret = shufflevector <4 x float> %val, <4 x float> undef,
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<4 x i32> zeroinitializer
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ret <4 x float> %ret
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}
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; Test a v4f32 replicating load with the maximum in-range offset.
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define <4 x float> @f14(float *%base) {
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; CHECK-LABEL: f14:
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; CHECK: vlrepf %v24, 4092(%r2)
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; CHECK: br %r14
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%ptr = getelementptr float, float *%base, i64 1023
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%scalar = load float, float *%ptr
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%val = insertelement <4 x float> undef, float %scalar, i32 0
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%ret = shufflevector <4 x float> %val, <4 x float> undef,
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<4 x i32> zeroinitializer
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ret <4 x float> %ret
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}
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; Test a v4f32 replicating load with the first out-of-range offset.
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define <4 x float> @f15(float *%base) {
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; CHECK-LABEL: f15:
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; CHECK: aghi %r2, 4096
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; CHECK: vlrepf %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr float, float *%base, i64 1024
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%scalar = load float, float *%ptr
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%val = insertelement <4 x float> undef, float %scalar, i32 0
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%ret = shufflevector <4 x float> %val, <4 x float> undef,
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<4 x i32> zeroinitializer
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ret <4 x float> %ret
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}
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2015-05-06 03:26:48 +08:00
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; Test a v2f64 replicating load with no offset.
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define <2 x double> @f16(double *%ptr) {
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; CHECK-LABEL: f16:
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; CHECK: vlrepg %v24, 0(%r2)
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; CHECK: br %r14
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%scalar = load double, double *%ptr
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%val = insertelement <2 x double> undef, double %scalar, i32 0
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%ret = shufflevector <2 x double> %val, <2 x double> undef,
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<2 x i32> zeroinitializer
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ret <2 x double> %ret
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}
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; Test a v2f64 replicating load with the maximum in-range offset.
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define <2 x double> @f17(double *%base) {
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; CHECK-LABEL: f17:
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; CHECK: vlrepg %v24, 4088(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, double *%base, i32 511
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%scalar = load double, double *%ptr
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%val = insertelement <2 x double> undef, double %scalar, i32 0
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%ret = shufflevector <2 x double> %val, <2 x double> undef,
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<2 x i32> zeroinitializer
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ret <2 x double> %ret
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}
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; Test a v2f64 replicating load with the first out-of-range offset.
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define <2 x double> @f18(double *%base) {
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; CHECK-LABEL: f18:
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; CHECK: aghi %r2, 4096
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; CHECK: vlrepg %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, double *%base, i32 512
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%scalar = load double, double *%ptr
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%val = insertelement <2 x double> undef, double %scalar, i32 0
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%ret = shufflevector <2 x double> %val, <2 x double> undef,
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<2 x i32> zeroinitializer
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ret <2 x double> %ret
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}
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[SystemZ] Add CodeGen support for integer vector types
This the first of a series of patches to add CodeGen support exploiting
the instructions of the z13 vector facility. This patch adds support
for the native integer vector types (v16i8, v8i16, v4i32, v2i64).
When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
(except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.
The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.
However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.
These alignment rules are not only implemented at the C language level
(implemented in clang), but also at the LLVM IR level. This is done
by selecting a different DataLayout string depending on whether the
vector ABI is in effect or not.
Based on a patch by Richard Sandiford.
llvm-svn: 236521
2015-05-06 03:25:42 +08:00
|
|
|
; Test a v16i8 replicating load with an index.
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define <16 x i8> @f19(i8 *%base, i64 %index) {
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; CHECK-LABEL: f19:
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; CHECK: vlrepb %v24, 1023(%r3,%r2)
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; CHECK: br %r14
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%ptr1 = getelementptr i8, i8 *%base, i64 %index
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%ptr = getelementptr i8, i8 *%ptr1, i64 1023
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%scalar = load i8, i8 *%ptr
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%val = insertelement <16 x i8> undef, i8 %scalar, i32 0
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%ret = shufflevector <16 x i8> %val, <16 x i8> undef,
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<16 x i32> zeroinitializer
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ret <16 x i8> %ret
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}
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