forked from OSchip/llvm-project
41 lines
1.6 KiB
LLVM
41 lines
1.6 KiB
LLVM
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; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
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%struct.RESULTS_S.A = type { i16, i16, i16, [4 x i8*], i32, i32, i32, %struct.list_head_s.B*, %struct.MAT_PARAMS_S.D, i16, i16, i16, i16, i16, %struct.CORE_PORTABLE_S.E }
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%struct.list_head_s.B = type { %struct.list_head_s.B*, %struct.list_data_s.C* }
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%struct.list_data_s.C = type { i16, i16 }
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%struct.MAT_PARAMS_S.D = type { i32, i16*, i16*, i32* }
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%struct.CORE_PORTABLE_S.E = type { i8 }
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; Test that we don't generate a zero extend in this case. Instead we generate
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; a single sign extend instead of two zero extends.
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; CHECK-NOT: zxth
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; Function Attrs: nounwind
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define void @core_bench_list(%struct.RESULTS_S.A* %res) #0 {
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entry:
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%seed3 = getelementptr inbounds %struct.RESULTS_S.A, %struct.RESULTS_S.A* %res, i32 0, i32 2
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%0 = load i16, i16* %seed3, align 2
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%cmp364 = icmp sgt i16 %0, 0
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br i1 %cmp364, label %for.body, label %while.body19.i160
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for.body:
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%i.0370 = phi i16 [ %inc50, %if.then ], [ 0, %entry ]
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br i1 undef, label %if.then, label %while.body.i273
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while.body.i273:
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%tobool.i272 = icmp eq %struct.list_head_s.B* undef, null
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br i1 %tobool.i272, label %if.then, label %while.body.i273
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if.then:
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%inc50 = add i16 %i.0370, 1
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%exitcond = icmp eq i16 %inc50, %0
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br i1 %exitcond, label %while.body19.i160, label %for.body
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while.body19.i160:
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br label %while.body19.i160
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}
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attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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