forked from OSchip/llvm-project
48 lines
1.3 KiB
LLVM
48 lines
1.3 KiB
LLVM
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}sub_var_var_i1:
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; GCN: s_xor_b64
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define amdgpu_kernel void @sub_var_var_i1(i1 addrspace(1)* %out, i1 addrspace(1)* %in0, i1 addrspace(1)* %in1) {
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%a = load volatile i1, i1 addrspace(1)* %in0
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%b = load volatile i1, i1 addrspace(1)* %in1
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%sub = sub i1 %a, %b
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store i1 %sub, i1 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}sub_var_imm_i1:
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; GCN: s_not_b64
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define amdgpu_kernel void @sub_var_imm_i1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) {
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%a = load volatile i1, i1 addrspace(1)* %in
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%sub = sub i1 %a, 1
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store i1 %sub, i1 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}sub_i1_cf:
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; GCN: v_cmp_ne_u32_e32 vcc, 0, {{v[0-9]+}}
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; GCN-NEXT: s_not_b64 s{{\[[0-9]+:[0-9]+\]}}, vcc
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define amdgpu_kernel void @sub_i1_cf(i1 addrspace(1)* %out, i1 addrspace(1)* %a, i1 addrspace(1)* %b) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%d_cmp = icmp ult i32 %tid, 16
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br i1 %d_cmp, label %if, label %else
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if:
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%0 = load volatile i1, i1 addrspace(1)* %a
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br label %endif
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else:
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%1 = load volatile i1, i1 addrspace(1)* %b
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br label %endif
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endif:
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%2 = phi i1 [%0, %if], [%1, %else]
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%3 = sub i1 %2, -1
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store i1 %3, i1 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x()
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