2011-10-02 00:41:13 +08:00
|
|
|
//===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===//
|
2005-04-22 08:00:37 +08:00
|
|
|
//
|
2003-10-21 04:20:30 +08:00
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
2007-12-30 04:37:13 +08:00
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
2005-04-22 08:00:37 +08:00
|
|
|
//
|
2003-10-21 04:20:30 +08:00
|
|
|
//===----------------------------------------------------------------------===//
|
2003-10-06 03:27:59 +08:00
|
|
|
//
|
2011-10-02 00:41:13 +08:00
|
|
|
// This file contains the main function for LLVM's TableGen.
|
2003-10-06 03:27:59 +08:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
2012-06-11 23:37:55 +08:00
|
|
|
#include "TableGenBackends.h" // Declares all backends.
|
|
|
|
#include "SetTheory.h"
|
2009-07-09 02:44:05 +08:00
|
|
|
#include "llvm/Support/CommandLine.h"
|
|
|
|
#include "llvm/Support/PrettyStackTrace.h"
|
2010-11-30 02:16:10 +08:00
|
|
|
#include "llvm/Support/Signals.h"
|
2011-10-02 00:41:13 +08:00
|
|
|
#include "llvm/TableGen/Error.h"
|
|
|
|
#include "llvm/TableGen/Main.h"
|
|
|
|
#include "llvm/TableGen/Record.h"
|
|
|
|
|
2004-08-01 11:55:39 +08:00
|
|
|
using namespace llvm;
|
2003-11-12 06:41:34 +08:00
|
|
|
|
2003-10-06 03:27:59 +08:00
|
|
|
enum ActionType {
|
|
|
|
PrintRecords,
|
|
|
|
GenEmitter,
|
2011-06-28 02:32:37 +08:00
|
|
|
GenRegisterInfo,
|
2011-06-29 04:07:07 +08:00
|
|
|
GenInstrInfo,
|
|
|
|
GenAsmWriter,
|
|
|
|
GenAsmMatcher,
|
2009-11-25 10:13:23 +08:00
|
|
|
GenDisassembler,
|
2011-07-09 01:36:35 +08:00
|
|
|
GenPseudoLowering,
|
2007-02-28 06:08:27 +08:00
|
|
|
GenCallingConv,
|
2005-09-03 09:14:03 +08:00
|
|
|
GenDAGISel,
|
2011-12-02 05:10:21 +08:00
|
|
|
GenDFAPacketizer,
|
2008-08-14 04:19:35 +08:00
|
|
|
GenFastISel,
|
2005-10-22 03:05:19 +08:00
|
|
|
GenSubtarget,
|
2006-03-03 10:32:46 +08:00
|
|
|
GenIntrinsic,
|
2009-02-05 09:49:45 +08:00
|
|
|
GenTgtIntrinsic,
|
2011-06-04 12:11:37 +08:00
|
|
|
PrintEnums,
|
2012-12-05 08:29:32 +08:00
|
|
|
PrintSets,
|
2013-03-22 07:40:38 +08:00
|
|
|
GenOptParserDefs,
|
|
|
|
GenCTags
|
2003-10-06 03:27:59 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
namespace {
|
|
|
|
cl::opt<ActionType>
|
|
|
|
Action(cl::desc("Action to perform:"),
|
|
|
|
cl::values(clEnumValN(PrintRecords, "print-records",
|
|
|
|
"Print all records to stdout (default)"),
|
|
|
|
clEnumValN(GenEmitter, "gen-emitter",
|
|
|
|
"Generate machine code emitter"),
|
2011-06-24 09:44:41 +08:00
|
|
|
clEnumValN(GenRegisterInfo, "gen-register-info",
|
2011-06-28 02:32:37 +08:00
|
|
|
"Generate registers and register classes info"),
|
2011-06-29 04:07:07 +08:00
|
|
|
clEnumValN(GenInstrInfo, "gen-instr-info",
|
2003-10-06 03:27:59 +08:00
|
|
|
"Generate instruction descriptions"),
|
2007-02-28 06:08:27 +08:00
|
|
|
clEnumValN(GenCallingConv, "gen-callingconv",
|
|
|
|
"Generate calling convention descriptions"),
|
2004-08-01 13:59:33 +08:00
|
|
|
clEnumValN(GenAsmWriter, "gen-asm-writer",
|
|
|
|
"Generate assembly writer"),
|
2009-11-25 10:13:23 +08:00
|
|
|
clEnumValN(GenDisassembler, "gen-disassembler",
|
|
|
|
"Generate disassembler"),
|
2011-07-09 01:36:35 +08:00
|
|
|
clEnumValN(GenPseudoLowering, "gen-pseudo-lowering",
|
|
|
|
"Generate pseudo instruction lowering"),
|
2009-07-12 03:39:44 +08:00
|
|
|
clEnumValN(GenAsmMatcher, "gen-asm-matcher",
|
|
|
|
"Generate assembly instruction matcher"),
|
2005-09-03 09:14:03 +08:00
|
|
|
clEnumValN(GenDAGISel, "gen-dag-isel",
|
|
|
|
"Generate a DAG instruction selector"),
|
2011-12-02 05:10:21 +08:00
|
|
|
clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer",
|
|
|
|
"Generate DFA Packetizer for VLIW targets"),
|
2008-08-14 04:19:35 +08:00
|
|
|
clEnumValN(GenFastISel, "gen-fast-isel",
|
|
|
|
"Generate a \"fast\" instruction selector"),
|
2005-10-22 03:05:19 +08:00
|
|
|
clEnumValN(GenSubtarget, "gen-subtarget",
|
|
|
|
"Generate subtarget enumerations"),
|
2006-03-03 10:32:46 +08:00
|
|
|
clEnumValN(GenIntrinsic, "gen-intrinsic",
|
|
|
|
"Generate intrinsic information"),
|
2009-02-05 09:49:45 +08:00
|
|
|
clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic",
|
|
|
|
"Generate target intrinsic information"),
|
2003-10-06 03:27:59 +08:00
|
|
|
clEnumValN(PrintEnums, "print-enums",
|
|
|
|
"Print enum values for a class"),
|
2011-06-04 12:11:37 +08:00
|
|
|
clEnumValN(PrintSets, "print-sets",
|
|
|
|
"Print expanded sets for testing DAG exprs"),
|
2012-12-05 08:29:32 +08:00
|
|
|
clEnumValN(GenOptParserDefs, "gen-opt-parser-defs",
|
|
|
|
"Generate option definitions"),
|
2013-03-22 07:40:38 +08:00
|
|
|
clEnumValN(GenCTags, "gen-ctags",
|
|
|
|
"Generate ctags-compatible index"),
|
2004-07-16 08:02:21 +08:00
|
|
|
clEnumValEnd));
|
2003-10-06 03:27:59 +08:00
|
|
|
|
|
|
|
cl::opt<std::string>
|
|
|
|
Class("class", cl::desc("Print Enum list for this class"),
|
2011-12-20 10:50:00 +08:00
|
|
|
cl::value_desc("class name"));
|
2012-06-11 23:37:55 +08:00
|
|
|
|
2012-10-04 05:29:19 +08:00
|
|
|
bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
|
|
|
|
switch (Action) {
|
|
|
|
case PrintRecords:
|
|
|
|
OS << Records; // No argument, dump all contents
|
|
|
|
break;
|
|
|
|
case GenEmitter:
|
|
|
|
EmitCodeEmitter(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenRegisterInfo:
|
|
|
|
EmitRegisterInfo(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenInstrInfo:
|
|
|
|
EmitInstrInfo(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenCallingConv:
|
|
|
|
EmitCallingConv(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenAsmWriter:
|
|
|
|
EmitAsmWriter(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenAsmMatcher:
|
|
|
|
EmitAsmMatcher(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenDisassembler:
|
|
|
|
EmitDisassembler(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenPseudoLowering:
|
|
|
|
EmitPseudoLowering(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenDAGISel:
|
|
|
|
EmitDAGISel(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenDFAPacketizer:
|
|
|
|
EmitDFAPacketizer(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenFastISel:
|
|
|
|
EmitFastISel(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenSubtarget:
|
|
|
|
EmitSubtarget(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenIntrinsic:
|
|
|
|
EmitIntrinsics(Records, OS);
|
|
|
|
break;
|
|
|
|
case GenTgtIntrinsic:
|
|
|
|
EmitIntrinsics(Records, OS, true);
|
|
|
|
break;
|
2012-12-05 08:29:32 +08:00
|
|
|
case GenOptParserDefs:
|
|
|
|
EmitOptParser(Records, OS);
|
|
|
|
break;
|
2012-10-04 05:29:19 +08:00
|
|
|
case PrintEnums:
|
|
|
|
{
|
|
|
|
std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
|
|
|
|
for (unsigned i = 0, e = Recs.size(); i != e; ++i)
|
|
|
|
OS << Recs[i]->getName() << ", ";
|
|
|
|
OS << "\n";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case PrintSets:
|
|
|
|
{
|
|
|
|
SetTheory Sets;
|
|
|
|
Sets.addFieldExpander("Set", "Elements");
|
|
|
|
std::vector<Record*> Recs = Records.getAllDerivedDefinitions("Set");
|
|
|
|
for (unsigned i = 0, e = Recs.size(); i != e; ++i) {
|
|
|
|
OS << Recs[i]->getName() << " = [";
|
|
|
|
const std::vector<Record*> *Elts = Sets.expand(Recs[i]);
|
|
|
|
assert(Elts && "Couldn't expand Set instance");
|
|
|
|
for (unsigned ei = 0, ee = Elts->size(); ei != ee; ++ei)
|
|
|
|
OS << ' ' << (*Elts)[ei]->getName();
|
|
|
|
OS << " ]\n";
|
2003-11-12 06:41:34 +08:00
|
|
|
}
|
2012-10-04 05:29:19 +08:00
|
|
|
break;
|
|
|
|
}
|
2013-03-22 07:40:38 +08:00
|
|
|
case GenCTags:
|
|
|
|
EmitCTags(Records, OS);
|
|
|
|
break;
|
2012-10-04 05:29:19 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
2011-12-20 10:50:00 +08:00
|
|
|
}
|
2011-10-02 00:41:13 +08:00
|
|
|
|
|
|
|
int main(int argc, char **argv) {
|
|
|
|
sys::PrintStackTraceOnErrorSignal();
|
|
|
|
PrettyStackTraceProgram X(argc, argv);
|
|
|
|
cl::ParseCommandLineOptions(argc, argv);
|
2010-05-05 12:13:08 +08:00
|
|
|
|
2012-10-04 05:29:19 +08:00
|
|
|
return TableGenMain(argv[0], &LLVMTableGenMain);
|
2003-10-06 03:27:59 +08:00
|
|
|
}
|