forked from OSchip/llvm-project
141 lines
5.2 KiB
LLVM
141 lines
5.2 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -o - %s -mtriple=x86_64--unknown-linux-gnu | FileCheck %s
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@base = external dso_local local_unnamed_addr global i16, align 2
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; We should be able to merge the two loads here
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define i16 @unify_through_trivial_asm() {
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; CHECK-LABEL: unify_through_trivial_asm:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzwl {{.*}}(%rip), %eax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %eax
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; CHECK-NEXT: incl %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: retq
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%x = load i16, i16* @base, align 2
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tail call void asm sideeffect "nop", "r,~{dirflag},~{fpsr},~{flags}"(i16 %x)
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%x2 = load i16, i16* @base, align 2
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%v = add i16 %x2, 1
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ret i16 %v
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}
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; The asm call prevents the merging the loads here.
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define i16 @unify_through_trival_asm_w_memory_clobber() {
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; CHECK-LABEL: unify_through_trival_asm_w_memory_clobber:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzwl {{.*}}(%rip), %eax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %eax
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; CHECK-NEXT: incl %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: retq
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%x = load i16, i16* @base, align 2
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tail call void asm sideeffect "nop", "+r,~{dirflag},~{fpsr},~{flags},~{base},~{memory}"(i16 %x)
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%x2 = load i16, i16* @base, align 2
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%v = add i16 %x2, 1
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ret i16 %v
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}
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define dso_local void @fulltest() local_unnamed_addr {
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; CHECK-LABEL: fulltest:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
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; CHECK-NEXT: addl $16, %edx
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: # kill: def $dx killed $dx killed $edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: outb %al, %dx
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
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; CHECK-NEXT: addl $16, %edx
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: # kill: def $dx killed $dx killed $edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: outb %al, %dx
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
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; CHECK-NEXT: addl $16, %edx
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; CHECK-NEXT: movb $2, %al
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; CHECK-NEXT: # kill: def $dx killed $dx killed $edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: outb %al, %dx
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
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; CHECK-NEXT: addl $16, %edx
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; CHECK-NEXT: movb $3, %al
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; CHECK-NEXT: # kill: def $dx killed $dx killed $edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: outb %al, %dx
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
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; CHECK-NEXT: addl $16, %edx
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; CHECK-NEXT: movb $4, %al
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; CHECK-NEXT: # kill: def $dx killed $dx killed $edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: outb %al, %dx
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
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; CHECK-NEXT: addl $16, %edx
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; CHECK-NEXT: movb $5, %al
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; CHECK-NEXT: # kill: def $dx killed $dx killed $edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: outb %al, %dx
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
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; CHECK-NEXT: addl $16, %edx
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; CHECK-NEXT: movb $6, %al
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; CHECK-NEXT: # kill: def $dx killed $dx killed $edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: outb %al, %dx
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
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; CHECK-NEXT: addl $16, %edx
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; CHECK-NEXT: movb $7, %al
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; CHECK-NEXT: # kill: def $dx killed $dx killed $edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: outb %al, %dx
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
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; CHECK-NEXT: addl $16, %edx
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; CHECK-NEXT: movb $8, %al
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; CHECK-NEXT: # kill: def $dx killed $dx killed $edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: outb %al, %dx
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: retq
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entry:
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%0 = load i16, i16* @base, align 2
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%add = add i16 %0, 16
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tail call void asm sideeffect "outb %al,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 0, i16 %add)
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%1 = load i16, i16* @base, align 2
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%add3 = add i16 %1, 16
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tail call void asm sideeffect "outb %al,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 1, i16 %add3)
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%2 = load i16, i16* @base, align 2
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%add6 = add i16 %2, 16
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tail call void asm sideeffect "outb %al,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 2, i16 %add6)
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%3 = load i16, i16* @base, align 2
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%add9 = add i16 %3, 16
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tail call void asm sideeffect "outb %al,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 3, i16 %add9)
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%4 = load i16, i16* @base, align 2
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%add12 = add i16 %4, 16
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tail call void asm sideeffect "outb %al,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 4, i16 %add12)
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%5 = load i16, i16* @base, align 2
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%add15 = add i16 %5, 16
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tail call void asm sideeffect "outb %al,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 5, i16 %add15)
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%6 = load i16, i16* @base, align 2
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%add18 = add i16 %6, 16
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tail call void asm sideeffect "outb %al,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 6, i16 %add18)
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%7 = load i16, i16* @base, align 2
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%add21 = add i16 %7, 16
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tail call void asm sideeffect "outb %al,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 7, i16 %add21)
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%8 = load i16, i16* @base, align 2
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%add24 = add i16 %8, 16
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tail call void asm sideeffect "outb %al,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 8, i16 %add24)
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ret void
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}
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