2017-09-05 05:43:32 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
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2015-06-30 04:28:47 +08:00
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; DAGCombiner crashes during sext folding
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define <2 x i256> @test_sext1() {
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2017-09-05 05:43:32 +08:00
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; X32-LABEL: test_sext1:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0:
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2017-09-05 05:43:32 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $-1, 60(%eax)
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; X32-NEXT: movl $-1, 56(%eax)
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; X32-NEXT: movl $-1, 52(%eax)
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; X32-NEXT: movl $-1, 48(%eax)
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; X32-NEXT: movl $-1, 44(%eax)
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; X32-NEXT: movl $-1, 40(%eax)
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; X32-NEXT: movl $-1, 36(%eax)
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; X32-NEXT: movl $-99, 32(%eax)
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_sext1:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2018-09-20 02:59:08 +08:00
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; X64-NEXT: movq %rdi, %rax
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2017-09-05 05:43:32 +08:00
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq $-1, 56(%rdi)
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; X64-NEXT: movq $-1, 48(%rdi)
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; X64-NEXT: movq $-1, 40(%rdi)
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; X64-NEXT: movq $-99, 32(%rdi)
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; X64-NEXT: retq
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2015-06-30 04:28:47 +08:00
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%Se = sext <2 x i8> <i8 -100, i8 -99> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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}
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define <2 x i256> @test_sext2() {
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2017-09-05 05:43:32 +08:00
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; X32-LABEL: test_sext2:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0:
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2017-09-05 05:43:32 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $-1, 60(%eax)
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; X32-NEXT: movl $-1, 56(%eax)
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; X32-NEXT: movl $-1, 52(%eax)
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; X32-NEXT: movl $-1, 48(%eax)
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; X32-NEXT: movl $-1, 44(%eax)
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; X32-NEXT: movl $-1, 40(%eax)
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; X32-NEXT: movl $-1, 36(%eax)
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; X32-NEXT: movl $-1999, 32(%eax) # imm = 0xF831
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_sext2:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2018-09-20 02:59:08 +08:00
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; X64-NEXT: movq %rdi, %rax
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2017-09-05 05:43:32 +08:00
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq $-1, 56(%rdi)
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; X64-NEXT: movq $-1, 48(%rdi)
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; X64-NEXT: movq $-1, 40(%rdi)
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; X64-NEXT: movq $-1999, 32(%rdi) # imm = 0xF831
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; X64-NEXT: retq
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2015-06-30 04:28:47 +08:00
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%Se = sext <2 x i128> <i128 -2000, i128 -1999> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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}
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define <2 x i256> @test_zext1() {
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2017-09-05 05:43:32 +08:00
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; X32-LABEL: test_zext1:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0:
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2017-09-05 05:43:32 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $0, 60(%eax)
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; X32-NEXT: movl $0, 56(%eax)
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; X32-NEXT: movl $0, 52(%eax)
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; X32-NEXT: movl $0, 48(%eax)
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; X32-NEXT: movl $0, 44(%eax)
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; X32-NEXT: movl $0, 40(%eax)
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; X32-NEXT: movl $0, 36(%eax)
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; X32-NEXT: movl $254, 32(%eax)
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_zext1:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2018-09-20 02:59:08 +08:00
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; X64-NEXT: movq %rdi, %rax
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2017-09-05 05:43:32 +08:00
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 48(%rdi)
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq $0, 40(%rdi)
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; X64-NEXT: movq $254, 32(%rdi)
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; X64-NEXT: retq
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2015-06-30 04:28:47 +08:00
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%Se = zext <2 x i8> <i8 -1, i8 -2> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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}
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define <2 x i256> @test_zext2() {
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2017-09-05 05:43:32 +08:00
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; X32-LABEL: test_zext2:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0:
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2017-09-05 05:43:32 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $0, 60(%eax)
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; X32-NEXT: movl $0, 56(%eax)
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; X32-NEXT: movl $0, 52(%eax)
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; X32-NEXT: movl $0, 48(%eax)
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; X32-NEXT: movl $-1, 44(%eax)
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; X32-NEXT: movl $-1, 40(%eax)
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; X32-NEXT: movl $-1, 36(%eax)
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; X32-NEXT: movl $-2, 32(%eax)
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_zext2:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2018-09-20 02:59:08 +08:00
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; X64-NEXT: movq %rdi, %rax
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2017-09-05 05:43:32 +08:00
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 48(%rdi)
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq $-1, 40(%rdi)
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; X64-NEXT: movq $-2, 32(%rdi)
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; X64-NEXT: retq
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2015-06-30 04:28:47 +08:00
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%Se = zext <2 x i128> <i128 -1, i128 -2> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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}
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