2019-04-30 11:39:05 +08:00
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=ppc64 < %s | FileCheck %s -check-prefixes=CHECK,GENERIC
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=970 < %s | FileCheck %s -check-prefixes=CHECK,PWR
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=a2 < %s | FileCheck %s -check-prefixes=CHECK,BASIC
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=e500mc < %s | FileCheck %s -check-prefixes=CHECK,BASIC
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=e5500 < %s | FileCheck %s -check-prefixes=CHECK,BASIC
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=pwr4 < %s | FileCheck %s -check-prefixes=CHECK,PWR
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=pwr5 < %s | FileCheck %s -check-prefixes=CHECK,PWR
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=pwr5x < %s | FileCheck %s -check-prefixes=CHECK,PWR
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=pwr6 < %s | FileCheck %s -check-prefixes=CHECK,PWR
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=pwr6x < %s | FileCheck %s -check-prefixes=CHECK,PWR
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s -check-prefixes=CHECK,PWR
|
|
|
|
|
; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s | FileCheck %s -check-prefixes=CHECK,PWR
|
2015-01-03 22:58:25 +08:00
|
|
|
target datalayout = "E-m:e-i64:64-n32:64"
|
|
|
|
|
target triple = "powerpc64-unknown-linux-gnu"
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nounwind readnone
|
|
|
|
|
define signext i32 @foo(i32 signext %x) #0 {
|
|
|
|
|
entry:
|
|
|
|
|
%mul = shl nsw i32 %x, 1
|
|
|
|
|
ret i32 %mul
|
|
|
|
|
|
2019-04-30 11:39:05 +08:00
|
|
|
; CHECK-LABEL: .globl foo
|
2016-01-26 08:03:25 +08:00
|
|
|
; GENERIC: .p2align 2
|
|
|
|
|
; BASIC: .p2align 4
|
|
|
|
|
; PWR: .p2align 4
|
2019-04-30 11:39:05 +08:00
|
|
|
; CHECK: @foo
|
2015-01-03 22:58:25 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nounwind
|
|
|
|
|
define void @loop(i32 signext %x, i32* nocapture %a) #1 {
|
|
|
|
|
entry:
|
|
|
|
|
br label %vector.body
|
|
|
|
|
|
2019-04-30 11:39:05 +08:00
|
|
|
; CHECK-LABEL: @loop
|
|
|
|
|
; CHECK: mtctr
|
2016-01-26 08:03:25 +08:00
|
|
|
; GENERIC-NOT: .p2align
|
|
|
|
|
; BASIC: .p2align 4
|
|
|
|
|
; PWR: .p2align 4
|
2019-04-30 11:39:05 +08:00
|
|
|
; CHECK: lwzu
|
|
|
|
|
; CHECK: bdnz
|
2015-01-03 22:58:25 +08:00
|
|
|
|
|
|
|
|
vector.body: ; preds = %vector.body, %entry
|
|
|
|
|
%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
|
|
|
|
|
%induction45 = or i64 %index, 1
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%0 = getelementptr inbounds i32, i32* %a, i64 %index
|
|
|
|
|
%1 = getelementptr inbounds i32, i32* %a, i64 %induction45
|
2015-02-28 05:17:42 +08:00
|
|
|
%2 = load i32, i32* %0, align 4
|
|
|
|
|
%3 = load i32, i32* %1, align 4
|
2015-01-03 22:58:25 +08:00
|
|
|
%4 = add nsw i32 %2, 4
|
|
|
|
|
%5 = add nsw i32 %3, 4
|
[PowerPC] Prepare loops for pre-increment loads/stores
PowerPC supports pre-increment load/store instructions (except for Altivec/VSX
vector load/stores). Using these on embedded cores can be very important, but
most loops are not naturally set up to use them. We can often change that,
however, by placing loops into a non-canonical form. Generically, this means
transforming loops like this:
for (int i = 0; i < n; ++i)
array[i] = c;
to look like this:
T *p = array[-1];
for (int i = 0; i < n; ++i)
*++p = c;
the key point is that addresses accessed are pulled into dedicated PHIs and
"pre-decremented" in the loop preheader. This allows the use of pre-increment
load/store instructions without loop peeling.
A target-specific late IR-level pass (running post-LSR), PPCLoopPreIncPrep, is
introduced to perform this transformation. I've used this code out-of-tree for
generating code for the PPC A2 for over a year. Somewhat to my surprise,
running the test suite + externals on a P7 with this transformation enabled
showed no performance regressions, and one speedup:
External/SPEC/CINT2006/483.xalancbmk/483.xalancbmk
-2.32514% +/- 1.03736%
So I'm going to enable it on everything for now. I was surprised by this
because, on the POWER cores, these pre-increment load/store instructions are
cracked (and, thus, harder to schedule effectively). But seeing no regressions,
and feeling that it is generally easier to split instructions apart late than
it is to combine them late, this might be the better approach regardless.
In the future, we might want to integrate this functionality into LSR (but
currently LSR does not create new PHI nodes, so (for that and other reasons)
significant work would need to be done).
llvm-svn: 228328
2015-02-06 02:43:00 +08:00
|
|
|
%6 = mul nsw i32 %4, 3
|
|
|
|
|
%7 = mul nsw i32 %5, 3
|
|
|
|
|
store i32 %6, i32* %0, align 4
|
|
|
|
|
store i32 %7, i32* %1, align 4
|
2015-01-03 22:58:25 +08:00
|
|
|
%index.next = add i64 %index, 2
|
[PowerPC] Prepare loops for pre-increment loads/stores
PowerPC supports pre-increment load/store instructions (except for Altivec/VSX
vector load/stores). Using these on embedded cores can be very important, but
most loops are not naturally set up to use them. We can often change that,
however, by placing loops into a non-canonical form. Generically, this means
transforming loops like this:
for (int i = 0; i < n; ++i)
array[i] = c;
to look like this:
T *p = array[-1];
for (int i = 0; i < n; ++i)
*++p = c;
the key point is that addresses accessed are pulled into dedicated PHIs and
"pre-decremented" in the loop preheader. This allows the use of pre-increment
load/store instructions without loop peeling.
A target-specific late IR-level pass (running post-LSR), PPCLoopPreIncPrep, is
introduced to perform this transformation. I've used this code out-of-tree for
generating code for the PPC A2 for over a year. Somewhat to my surprise,
running the test suite + externals on a P7 with this transformation enabled
showed no performance regressions, and one speedup:
External/SPEC/CINT2006/483.xalancbmk/483.xalancbmk
-2.32514% +/- 1.03736%
So I'm going to enable it on everything for now. I was surprised by this
because, on the POWER cores, these pre-increment load/store instructions are
cracked (and, thus, harder to schedule effectively). But seeing no regressions,
and feeling that it is generally easier to split instructions apart late than
it is to combine them late, this might be the better approach regardless.
In the future, we might want to integrate this functionality into LSR (but
currently LSR does not create new PHI nodes, so (for that and other reasons)
significant work would need to be done).
llvm-svn: 228328
2015-02-06 02:43:00 +08:00
|
|
|
%8 = icmp eq i64 %index.next, 2048
|
|
|
|
|
br i1 %8, label %for.end, label %vector.body
|
2015-01-03 22:58:25 +08:00
|
|
|
|
|
|
|
|
for.end: ; preds = %vector.body
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2015-01-04 01:58:24 +08:00
|
|
|
; Function Attrs: nounwind
|
|
|
|
|
define void @sloop(i32 signext %x, i32* nocapture %a) #1 {
|
|
|
|
|
entry:
|
|
|
|
|
br label %for.body
|
|
|
|
|
|
2019-04-30 11:39:05 +08:00
|
|
|
; CHECK-LABEL: @sloop
|
|
|
|
|
; CHECK: mtctr
|
2016-01-26 08:03:25 +08:00
|
|
|
; GENERIC-NOT: .p2align
|
|
|
|
|
; BASIC: .p2align 4
|
|
|
|
|
; PWR: .p2align 5
|
2019-04-30 11:39:05 +08:00
|
|
|
; CHECK: bdnz
|
2015-01-04 01:58:24 +08:00
|
|
|
|
|
|
|
|
for.body: ; preds = %for.body, %entry
|
|
|
|
|
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
|
2015-02-28 05:17:42 +08:00
|
|
|
%0 = load i32, i32* %arrayidx, align 4
|
2015-01-04 01:58:24 +08:00
|
|
|
%add = add nsw i32 %0, 4
|
[PowerPC] Prepare loops for pre-increment loads/stores
PowerPC supports pre-increment load/store instructions (except for Altivec/VSX
vector load/stores). Using these on embedded cores can be very important, but
most loops are not naturally set up to use them. We can often change that,
however, by placing loops into a non-canonical form. Generically, this means
transforming loops like this:
for (int i = 0; i < n; ++i)
array[i] = c;
to look like this:
T *p = array[-1];
for (int i = 0; i < n; ++i)
*++p = c;
the key point is that addresses accessed are pulled into dedicated PHIs and
"pre-decremented" in the loop preheader. This allows the use of pre-increment
load/store instructions without loop peeling.
A target-specific late IR-level pass (running post-LSR), PPCLoopPreIncPrep, is
introduced to perform this transformation. I've used this code out-of-tree for
generating code for the PPC A2 for over a year. Somewhat to my surprise,
running the test suite + externals on a P7 with this transformation enabled
showed no performance regressions, and one speedup:
External/SPEC/CINT2006/483.xalancbmk/483.xalancbmk
-2.32514% +/- 1.03736%
So I'm going to enable it on everything for now. I was surprised by this
because, on the POWER cores, these pre-increment load/store instructions are
cracked (and, thus, harder to schedule effectively). But seeing no regressions,
and feeling that it is generally easier to split instructions apart late than
it is to combine them late, this might be the better approach regardless.
In the future, we might want to integrate this functionality into LSR (but
currently LSR does not create new PHI nodes, so (for that and other reasons)
significant work would need to be done).
llvm-svn: 228328
2015-02-06 02:43:00 +08:00
|
|
|
%mul = mul nsw i32 %add, 3
|
|
|
|
|
store i32 %mul, i32* %arrayidx, align 4
|
2015-01-04 01:58:24 +08:00
|
|
|
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
|
|
|
|
%exitcond = icmp eq i64 %indvars.iv.next, 2048
|
|
|
|
|
br i1 %exitcond, label %for.end, label %for.body
|
|
|
|
|
|
|
|
|
|
for.end: ; preds = %for.body
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-30 06:01:10 +08:00
|
|
|
; Function Attrs: nounwind
|
|
|
|
|
define void @test_minsize(i32 signext %x, i32* nocapture %a) #2 {
|
|
|
|
|
entry:
|
|
|
|
|
br label %vector.body
|
|
|
|
|
|
2019-04-30 11:39:05 +08:00
|
|
|
; CHECK-LABEL: @test_minsize
|
|
|
|
|
; CHECK: mtctr
|
2016-04-30 06:01:10 +08:00
|
|
|
; GENERIC-NOT: .p2align
|
|
|
|
|
; BASIC-NOT: .p2align
|
|
|
|
|
; PWR-NOT: .p2align
|
2019-04-30 11:39:05 +08:00
|
|
|
; CHECK: lwzu
|
|
|
|
|
; CHECK: bdnz
|
2016-04-30 06:01:10 +08:00
|
|
|
|
|
|
|
|
vector.body: ; preds = %vector.body, %entry
|
|
|
|
|
%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
|
|
|
|
|
%induction45 = or i64 %index, 1
|
|
|
|
|
%0 = getelementptr inbounds i32, i32* %a, i64 %index
|
|
|
|
|
%1 = getelementptr inbounds i32, i32* %a, i64 %induction45
|
|
|
|
|
%2 = load i32, i32* %0, align 4
|
|
|
|
|
%3 = load i32, i32* %1, align 4
|
|
|
|
|
%4 = add nsw i32 %2, 4
|
|
|
|
|
%5 = add nsw i32 %3, 4
|
|
|
|
|
%6 = mul nsw i32 %4, 3
|
|
|
|
|
%7 = mul nsw i32 %5, 3
|
|
|
|
|
store i32 %6, i32* %0, align 4
|
|
|
|
|
store i32 %7, i32* %1, align 4
|
|
|
|
|
%index.next = add i64 %index, 2
|
|
|
|
|
%8 = icmp eq i64 %index.next, 2048
|
|
|
|
|
br i1 %8, label %for.end, label %vector.body
|
|
|
|
|
|
|
|
|
|
for.end: ; preds = %vector.body
|
|
|
|
|
ret void
|
|
|
|
|
}
|
2015-01-03 22:58:25 +08:00
|
|
|
attributes #0 = { nounwind readnone }
|
|
|
|
|
attributes #1 = { nounwind }
|
2016-04-30 06:01:10 +08:00
|
|
|
attributes #2 = { nounwind minsize}
|
2015-01-03 22:58:25 +08:00
|
|
|
|