[arm] Implement eabi_attribute, cpu, and fpu directives.
This commit allows the ARM integrated assembler to parse
and assemble the code with .eabi_attribute, .cpu, and
.fpu directives.
To implement the feature, this commit moves the code from
AttrEmitter to ARMTargetStreamers, and several new test
cases related to cortex-m4, cortex-r5, and cortex-a15 are
added.
Besides, this commit also change the Subtarget->isFPOnlySP()
to Subtarget->hasD16() to match the usage of .fpu directive.
This commit changes the test cases:
* Several .eabi_attribute directives in
2010-09-29-mc-asm-header-test.ll are removed because the .fpu
directive already cover the functionality.
* In the Cortex-A15 test case, the value for
Tag_Advanced_SIMD_arch has be changed from 1 to 2,
which is more precise.
llvm-svn: 193524
2013-10-29 01:51:12 +08:00
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; This tests that MC/asm header conversion is smooth and that the
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; build attributes are correct
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2014-01-16 23:11:54 +08:00
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; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale | FileCheck %s --check-prefix=XSCALE
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2013-10-08 00:55:23 +08:00
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; RUN: llc < %s -mtriple=armv6-linux-gnueabi | FileCheck %s --check-prefix=V6
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi | FileCheck %s --check-prefix=V6M
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; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s | FileCheck %s --check-prefix=ARM1156T2F-S
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
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2013-06-27 00:58:26 +08:00
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
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; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
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2013-10-14 21:16:57 +08:00
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
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2013-11-25 21:17:15 +08:00
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
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2013-11-01 19:21:16 +08:00
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
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2013-11-22 19:53:16 +08:00
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
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2013-11-01 21:27:35 +08:00
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9-mp | FileCheck %s --check-prefix=CORTEX-A9-MP
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[arm] Implement eabi_attribute, cpu, and fpu directives.
This commit allows the ARM integrated assembler to parse
and assemble the code with .eabi_attribute, .cpu, and
.fpu directives.
To implement the feature, this commit moves the code from
AttrEmitter to ARMTargetStreamers, and several new test
cases related to cortex-m4, cortex-r5, and cortex-a15 are
added.
Besides, this commit also change the Subtarget->isFPOnlySP()
to Subtarget->hasD16() to match the usage of .fpu directive.
This commit changes the test cases:
* Several .eabi_attribute directives in
2010-09-29-mc-asm-header-test.ll are removed because the .fpu
directive already cover the functionality.
* In the Cortex-A15 test case, the value for
Tag_Advanced_SIMD_arch has be changed from 1 to 2,
which is more precise.
llvm-svn: 193524
2013-10-29 01:51:12 +08:00
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
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2013-10-08 00:55:23 +08:00
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
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2014-01-20 18:18:42 +08:00
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
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2013-11-01 19:21:16 +08:00
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
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2013-10-08 00:55:23 +08:00
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
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2013-10-14 21:17:07 +08:00
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
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2013-11-22 00:22:39 +08:00
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
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2013-10-08 00:55:23 +08:00
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2014-01-16 23:11:54 +08:00
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; XSCALE: .eabi_attribute 6, 5
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; XSCALE: .eabi_attribute 8, 1
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; XSCALE: .eabi_attribute 9, 1
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2013-10-08 00:55:23 +08:00
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; V6: .eabi_attribute 6, 6
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; V6: .eabi_attribute 8, 1
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; V6: .eabi_attribute 24, 1
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; V6: .eabi_attribute 25, 1
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2013-11-01 19:21:16 +08:00
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; V6-NOT: .eabi_attribute 27
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; V6-NOT: .eabi_attribute 28
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2013-11-12 18:38:05 +08:00
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; V6-NOT: .eabi_attribute 36
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2013-11-01 21:27:35 +08:00
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; V6-NOT: .eabi_attribute 42
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; V6-NOT: .eabi_attribute 68
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2013-10-08 00:55:23 +08:00
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; V6M: .eabi_attribute 6, 12
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2014-01-11 00:42:55 +08:00
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; V6M-NOT: .eabi_attribute 7
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2013-10-08 00:55:23 +08:00
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; V6M: .eabi_attribute 8, 0
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; V6M: .eabi_attribute 9, 1
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; V6M: .eabi_attribute 24, 1
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; V6M: .eabi_attribute 25, 1
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2013-11-01 19:21:16 +08:00
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; V6M-NOT: .eabi_attribute 27
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; V6M-NOT: .eabi_attribute 28
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2013-11-12 18:38:05 +08:00
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; V6M-NOT: .eabi_attribute 36
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2013-11-01 21:27:35 +08:00
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; V6M-NOT: .eabi_attribute 42
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; V6M-NOT: .eabi_attribute 68
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2013-10-08 00:55:23 +08:00
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; ARM1156T2F-S: .cpu arm1156t2f-s
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; ARM1156T2F-S: .eabi_attribute 6, 8
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; ARM1156T2F-S: .eabi_attribute 8, 1
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; ARM1156T2F-S: .eabi_attribute 9, 2
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; ARM1156T2F-S: .fpu vfpv2
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; ARM1156T2F-S: .eabi_attribute 20, 1
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; ARM1156T2F-S: .eabi_attribute 21, 1
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; ARM1156T2F-S: .eabi_attribute 23, 3
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; ARM1156T2F-S: .eabi_attribute 24, 1
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; ARM1156T2F-S: .eabi_attribute 25, 1
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2013-11-01 19:21:16 +08:00
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; ARM1156T2F-S-NOT: .eabi_attribute 27
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; ARM1156T2F-S-NOT: .eabi_attribute 28
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2013-11-12 18:38:05 +08:00
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; ARM1156T2F-S-NOT: .eabi_attribute 36
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2013-11-01 21:27:35 +08:00
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; ARM1156T2F-S-NOT: .eabi_attribute 42
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; ARM1156T2F-S-NOT: .eabi_attribute 68
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2013-10-08 00:55:23 +08:00
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; V7M: .eabi_attribute 6, 10
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; V7M: .eabi_attribute 7, 77
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; V7M: .eabi_attribute 8, 0
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; V7M: .eabi_attribute 9, 2
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; V7M: .eabi_attribute 24, 1
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; V7M: .eabi_attribute 25, 1
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2013-11-01 19:21:16 +08:00
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; V7M-NOT: .eabi_attribute 27
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; V7M-NOT: .eabi_attribute 28
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2013-11-12 18:38:05 +08:00
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; V7M-NOT: .eabi_attribute 36
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2013-11-01 21:27:35 +08:00
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; V7M-NOT: .eabi_attribute 42
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2014-01-20 18:18:42 +08:00
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; V7M-NOT: .eabi_attribute 44
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2013-11-01 21:27:35 +08:00
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; V7M-NOT: .eabi_attribute 68
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2013-10-08 00:55:23 +08:00
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2013-06-27 00:58:26 +08:00
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; V7: .syntax unified
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; V7: .eabi_attribute 6, 10
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; V7: .eabi_attribute 20, 1
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; V7: .eabi_attribute 21, 1
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; V7: .eabi_attribute 23, 3
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; V7: .eabi_attribute 24, 1
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; V7: .eabi_attribute 25, 1
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2013-11-01 19:21:16 +08:00
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; V7-NOT: .eabi_attribute 27
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; V7-NOT: .eabi_attribute 28
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2013-11-12 18:38:05 +08:00
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; V7-NOT: .eabi_attribute 36
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2013-11-01 21:27:35 +08:00
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; V7-NOT: .eabi_attribute 42
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; V7-NOT: .eabi_attribute 68
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2013-06-27 00:58:26 +08:00
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; V8: .syntax unified
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; V8: .eabi_attribute 6, 14
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; Vt8: .syntax unified
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; Vt8: .eabi_attribute 6, 14
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2010-09-30 10:45:56 +08:00
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2013-09-13 21:46:57 +08:00
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; V8-FPARMv8: .syntax unified
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; V8-FPARMv8: .eabi_attribute 6, 14
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; V8-FPARMv8: .fpu fp-armv8
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2013-06-27 19:49:26 +08:00
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; V8-NEON: .syntax unified
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; V8-NEON: .eabi_attribute 6, 14
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2013-10-03 20:18:56 +08:00
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; V8-NEON: .fpu neon
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2013-06-27 19:49:26 +08:00
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; V8-NEON: .eabi_attribute 12, 3
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2013-09-13 21:46:57 +08:00
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; V8-FPARMv8-NEON: .syntax unified
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; V8-FPARMv8-NEON: .eabi_attribute 6, 14
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; V8-FPARMv8-NEON: .fpu neon-fp-armv8
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2013-10-08 00:55:23 +08:00
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; V8-FPARMv8-NEON: .eabi_attribute 12, 3
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; V8-FPARMv8-NEON-CRYPTO: .syntax unified
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; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
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; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
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; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
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2013-11-22 00:22:39 +08:00
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; Tag_CPU_arch 'ARMv7'
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; CORTEX-A7-CHECK: .eabi_attribute 6, 10
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; CORTEX-A7-NOFPU: .eabi_attribute 6, 10
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; CORTEX-A7-FPUV4: .eabi_attribute 6, 10
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; Tag_CPU_arch_profile 'A'
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; CORTEX-A7-CHECK: .eabi_attribute 7, 65
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; CORTEX-A7-NOFPU: .eabi_attribute 7, 65
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; CORTEX-A7-FPUV4: .eabi_attribute 7, 65
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; Tag_ARM_ISA_use
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; CORTEX-A7-CHECK: .eabi_attribute 8, 1
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; CORTEX-A7-NOFPU: .eabi_attribute 8, 1
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; CORTEX-A7-FPUV4: .eabi_attribute 8, 1
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; Tag_THUMB_ISA_use
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; CORTEX-A7-CHECK: .eabi_attribute 9, 2
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; CORTEX-A7-NOFPU: .eabi_attribute 9, 2
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; CORTEX-A7-FPUV4: .eabi_attribute 9, 2
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; CORTEX-A7-CHECK: .fpu neon-vfpv4
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; CORTEX-A7-NOFPU-NOT: .fpu
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; CORTEX-A7-FPUV4: .fpu vfpv4
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; Tag_ABI_FP_denormal
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; CORTEX-A7-CHECK: .eabi_attribute 20, 1
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; CORTEX-A7-NOFPU: .eabi_attribute 20, 1
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; CORTEX-A7-FPUV4: .eabi_attribute 20, 1
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; Tag_ABI_FP_exceptions
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; CORTEX-A7-CHECK: .eabi_attribute 21, 1
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; CORTEX-A7-NOFPU: .eabi_attribute 21, 1
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; CORTEX-A7-FPUV4: .eabi_attribute 21, 1
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; Tag_ABI_FP_number_model
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; CORTEX-A7-CHECK: .eabi_attribute 23, 3
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; CORTEX-A7-NOFPU: .eabi_attribute 23, 3
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; CORTEX-A7-FPUV4: .eabi_attribute 23, 3
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; Tag_ABI_align_needed
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; CORTEX-A7-CHECK: .eabi_attribute 24, 1
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; CORTEX-A7-NOFPU: .eabi_attribute 24, 1
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; CORTEX-A7-FPUV4: .eabi_attribute 24, 1
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2014-01-19 16:25:35 +08:00
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; Tag_ABI_align_preserved
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2013-11-22 00:22:39 +08:00
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; CORTEX-A7-CHECK: .eabi_attribute 25, 1
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; CORTEX-A7-NOFPU: .eabi_attribute 25, 1
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; CORTEX-A7-FPUV4: .eabi_attribute 25, 1
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; Tag_FP_HP_extension
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; CORTEX-A7-CHECK: .eabi_attribute 36, 1
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; CORTEX-A7-NOFPU: .eabi_attribute 36, 1
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; CORTEX-A7-FPUV4: .eabi_attribute 36, 1
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; Tag_MPextension_use
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; CORTEX-A7-CHECK: .eabi_attribute 42, 1
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; CORTEX-A7-NOFPU: .eabi_attribute 42, 1
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; CORTEX-A7-FPUV4: .eabi_attribute 42, 1
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; Tag_DIV_use
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; CORTEX-A7-CHECK: .eabi_attribute 44, 2
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; CORTEX-A7-NOFPU: .eabi_attribute 44, 2
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; CORTEX-A7-FPUV4: .eabi_attribute 44, 2
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; Tag_Virtualization_use
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; CORTEX-A7-CHECK: .eabi_attribute 68, 3
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; CORTEX-A7-NOFPU: .eabi_attribute 68, 3
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; CORTEX-A7-FPUV4: .eabi_attribute 68, 3
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|
|
2013-11-25 21:17:15 +08:00
|
|
|
; CORTEX-A5-DEFAULT: .cpu cortex-a5
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-A5-DEFAULT: .fpu neon-vfpv4
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1
|
|
|
|
|
; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1
|
|
|
|
|
|
|
|
|
|
; CORTEX-A5-NONEON: .cpu cortex-a5
|
|
|
|
|
; CORTEX-A5-NONEON: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-A5-NONEON: .eabi_attribute 7, 65
|
|
|
|
|
; CORTEX-A5-NONEON: .eabi_attribute 8, 1
|
|
|
|
|
; CORTEX-A5-NONEON: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-A5-NONEON: .fpu vfpv4-d16
|
|
|
|
|
; CORTEX-A5-NONEON: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-A5-NONEON: .eabi_attribute 21, 1
|
|
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|
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; CORTEX-A5-NONEON: .eabi_attribute 23, 3
|
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; CORTEX-A5-NONEON: .eabi_attribute 24, 1
|
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; CORTEX-A5-NONEON: .eabi_attribute 25, 1
|
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; CORTEX-A5-NONEON: .eabi_attribute 42, 1
|
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; CORTEX-A5-NONEON: .eabi_attribute 68, 1
|
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; CORTEX-A5-NOFPU: .cpu cortex-a5
|
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; CORTEX-A5-NOFPU: .eabi_attribute 6, 10
|
|
|
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; CORTEX-A5-NOFPU: .eabi_attribute 7, 65
|
|
|
|
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; CORTEX-A5-NOFPU: .eabi_attribute 8, 1
|
|
|
|
|
; CORTEX-A5-NOFPU: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-A5-NOFPU-NOT: .fpu
|
|
|
|
|
; CORTEX-A5-NOFPU: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-A5-NOFPU: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-A5-NOFPU: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-A5-NOFPU: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-A5-NOFPU: .eabi_attribute 25, 1
|
|
|
|
|
; CORTEX-A5-NOFPU: .eabi_attribute 42, 1
|
|
|
|
|
; CORTEX-A5-NOFPU: .eabi_attribute 68, 1
|
2013-11-22 00:22:39 +08:00
|
|
|
|
2013-11-01 19:21:16 +08:00
|
|
|
; CORTEX-A9-SOFT: .cpu cortex-a9
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 7, 65
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 8, 1
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-A9-SOFT: .fpu neon
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 25, 1
|
|
|
|
|
; CORTEX-A9-SOFT-NOT: .eabi_attribute 27
|
|
|
|
|
; CORTEX-A9-SOFT-NOT: .eabi_attribute 28
|
2013-11-12 18:38:05 +08:00
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 36, 1
|
2013-11-01 21:27:35 +08:00
|
|
|
; CORTEX-A9-SOFT-NOT: .eabi_attribute 42
|
|
|
|
|
; CORTEX-A9-SOFT: .eabi_attribute 68, 1
|
2013-11-01 19:21:16 +08:00
|
|
|
|
|
|
|
|
; CORTEX-A9-HARD: .cpu cortex-a9
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 7, 65
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 8, 1
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-A9-HARD: .fpu neon
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 25, 1
|
|
|
|
|
; CORTEX-A9-HARD-NOT: .eabi_attribute 27
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 28, 1
|
2013-11-12 18:38:05 +08:00
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 36, 1
|
2013-11-01 21:27:35 +08:00
|
|
|
; CORTEX-A9-HARD-NOT: .eabi_attribute 42
|
|
|
|
|
; CORTEX-A9-HARD: .eabi_attribute 68, 1
|
|
|
|
|
|
|
|
|
|
; CORTEX-A9-MP: .cpu cortex-a9-mp
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 7, 65
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 8, 1
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-A9-MP: .fpu neon
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 25, 1
|
2014-02-16 15:31:05 +08:00
|
|
|
; CORTEX-A9-MP-NOT: .eabi_attribute 27
|
|
|
|
|
; CORTEX-A9-MP-NOT: .eabi_attribute 28
|
2013-11-12 18:38:05 +08:00
|
|
|
; CORTEX-A9-MP: .eabi_attribute 36, 1
|
2013-11-01 21:27:35 +08:00
|
|
|
; CORTEX-A9-MP: .eabi_attribute 42, 1
|
|
|
|
|
; CORTEX-A9-MP: .eabi_attribute 68, 1
|
2013-10-08 00:55:23 +08:00
|
|
|
|
2013-11-22 19:53:16 +08:00
|
|
|
; CORTEX-A12-DEFAULT: .cpu cortex-a12
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-A12-DEFAULT: .fpu neon-vfpv4
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2
|
|
|
|
|
; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3
|
|
|
|
|
|
|
|
|
|
; CORTEX-A12-NOFPU: .cpu cortex-a12
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 7, 65
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 8, 1
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-A12-NOFPU-NOT: .fpu
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 25, 1
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 42, 1
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 44, 2
|
|
|
|
|
; CORTEX-A12-NOFPU: .eabi_attribute 68, 3
|
|
|
|
|
|
[arm] Implement eabi_attribute, cpu, and fpu directives.
This commit allows the ARM integrated assembler to parse
and assemble the code with .eabi_attribute, .cpu, and
.fpu directives.
To implement the feature, this commit moves the code from
AttrEmitter to ARMTargetStreamers, and several new test
cases related to cortex-m4, cortex-r5, and cortex-a15 are
added.
Besides, this commit also change the Subtarget->isFPOnlySP()
to Subtarget->hasD16() to match the usage of .fpu directive.
This commit changes the test cases:
* Several .eabi_attribute directives in
2010-09-29-mc-asm-header-test.ll are removed because the .fpu
directive already cover the functionality.
* In the Cortex-A15 test case, the value for
Tag_Advanced_SIMD_arch has be changed from 1 to 2,
which is more precise.
llvm-svn: 193524
2013-10-29 01:51:12 +08:00
|
|
|
; CORTEX-A15: .cpu cortex-a15
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 7, 65
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 8, 1
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-A15: .fpu neon-vfpv4
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 25, 1
|
2013-11-01 19:21:16 +08:00
|
|
|
; CORTEX-A15-NOT: .eabi_attribute 27
|
|
|
|
|
; CORTEX-A15-NOT: .eabi_attribute 28
|
2013-11-12 18:38:05 +08:00
|
|
|
; CORTEX-A15: .eabi_attribute 36, 1
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 42, 1
|
|
|
|
|
; CORTEX-A15: .eabi_attribute 44, 2
|
2013-11-01 21:27:35 +08:00
|
|
|
; CORTEX-A15: .eabi_attribute 68, 3
|
[arm] Implement eabi_attribute, cpu, and fpu directives.
This commit allows the ARM integrated assembler to parse
and assemble the code with .eabi_attribute, .cpu, and
.fpu directives.
To implement the feature, this commit moves the code from
AttrEmitter to ARMTargetStreamers, and several new test
cases related to cortex-m4, cortex-r5, and cortex-a15 are
added.
Besides, this commit also change the Subtarget->isFPOnlySP()
to Subtarget->hasD16() to match the usage of .fpu directive.
This commit changes the test cases:
* Several .eabi_attribute directives in
2010-09-29-mc-asm-header-test.ll are removed because the .fpu
directive already cover the functionality.
* In the Cortex-A15 test case, the value for
Tag_Advanced_SIMD_arch has be changed from 1 to 2,
which is more precise.
llvm-svn: 193524
2013-10-29 01:51:12 +08:00
|
|
|
|
2013-10-08 00:55:23 +08:00
|
|
|
; CORTEX-M0: .cpu cortex-m0
|
|
|
|
|
; CORTEX-M0: .eabi_attribute 6, 12
|
2014-01-11 00:42:55 +08:00
|
|
|
; CORTEX-M0-NOT: .eabi_attribute 7
|
2013-10-08 00:55:23 +08:00
|
|
|
; CORTEX-M0: .eabi_attribute 8, 0
|
|
|
|
|
; CORTEX-M0: .eabi_attribute 9, 1
|
|
|
|
|
; CORTEX-M0: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-M0: .eabi_attribute 25, 1
|
2013-11-01 19:21:16 +08:00
|
|
|
; CORTEX-M0-NOT: .eabi_attribute 27
|
|
|
|
|
; CORTEX-M0-NOT: .eabi_attribute 28
|
2013-11-12 18:38:05 +08:00
|
|
|
; CORTEX-M0-NOT: .eabi_attribute 36
|
2013-11-01 21:27:35 +08:00
|
|
|
; CORTEX-M0-NOT: .eabi_attribute 42
|
|
|
|
|
; CORTEX-M0-NOT: .eabi_attribute 68
|
2013-11-01 19:21:16 +08:00
|
|
|
|
2014-01-20 18:18:42 +08:00
|
|
|
; CORTEX-M3: .cpu cortex-m3
|
|
|
|
|
; CORTEX-M3: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-M3: .eabi_attribute 7, 77
|
|
|
|
|
; CORTEX-M3: .eabi_attribute 8, 0
|
|
|
|
|
; CORTEX-M3: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-M3: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-M3: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-M3: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-M3: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-M3: .eabi_attribute 25, 1
|
|
|
|
|
; CORTEX-M3-NOT: .eabi_attribute 27
|
|
|
|
|
; CORTEX-M3-NOT: .eabi_attribute 28
|
|
|
|
|
; CORTEX-M3-NOT: .eabi_attribute 36
|
|
|
|
|
; CORTEX-M3-NOT: .eabi_attribute 42
|
|
|
|
|
; CORTEX-M3-NOT: .eabi_attribute 44
|
|
|
|
|
; CORTEX-M3-NOT: .eabi_attribute 68
|
|
|
|
|
|
2013-11-01 19:21:16 +08:00
|
|
|
; CORTEX-M4-SOFT: .cpu cortex-m4
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 6, 13
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 7, 77
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 8, 0
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-M4-SOFT: .fpu vfpv4-d16
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 25, 1
|
|
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 27, 1
|
|
|
|
|
; CORTEX-M4-SOFT-NOT: .eabi_attribute 28
|
2013-11-12 18:38:05 +08:00
|
|
|
; CORTEX-M4-SOFT: .eabi_attribute 36, 1
|
2013-11-01 21:27:35 +08:00
|
|
|
; CORTEX-M4-SOFT-NOT: .eabi_attribute 42
|
2014-01-20 18:18:42 +08:00
|
|
|
; CORTEX-M4-SOFT-NOT: .eabi_attribute 44
|
2013-11-01 21:27:35 +08:00
|
|
|
; CORTEX-M4-SOFT-NOT: .eabi_attribute 68
|
2013-11-01 19:21:16 +08:00
|
|
|
|
|
|
|
|
; CORTEX-M4-HARD: .cpu cortex-m4
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 6, 13
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 7, 77
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 8, 0
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 9, 2
|
|
|
|
|
; CORTEX-M4-HARD: .fpu vfpv4-d16
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 20, 1
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 21, 1
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 23, 3
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 24, 1
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 25, 1
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 27, 1
|
|
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 28, 1
|
2013-11-12 18:38:05 +08:00
|
|
|
; CORTEX-M4-HARD: .eabi_attribute 36, 1
|
2013-11-01 21:27:35 +08:00
|
|
|
; CORTEX-M4-HARD-NOT: .eabi_attribute 42
|
2014-01-20 18:18:42 +08:00
|
|
|
; CORTEX-M4-HARD-NOT: .eabi_attribute 44
|
2014-02-16 15:31:05 +08:00
|
|
|
; CORTEX-M4-HARD-NOT: .eabi_attribute 68
|
2013-10-08 00:55:23 +08:00
|
|
|
|
|
|
|
|
; CORTEX-R5: .cpu cortex-r5
|
|
|
|
|
; CORTEX-R5: .eabi_attribute 6, 10
|
|
|
|
|
; CORTEX-R5: .eabi_attribute 7, 82
|
2013-11-01 21:27:35 +08:00
|
|
|
; CORTEX-R5: .eabi_attribute 8, 1
|
2013-10-08 00:55:23 +08:00
|
|
|
; CORTEX-R5: .eabi_attribute 9, 2
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[arm] Implement eabi_attribute, cpu, and fpu directives.
This commit allows the ARM integrated assembler to parse
and assemble the code with .eabi_attribute, .cpu, and
.fpu directives.
To implement the feature, this commit moves the code from
AttrEmitter to ARMTargetStreamers, and several new test
cases related to cortex-m4, cortex-r5, and cortex-a15 are
added.
Besides, this commit also change the Subtarget->isFPOnlySP()
to Subtarget->hasD16() to match the usage of .fpu directive.
This commit changes the test cases:
* Several .eabi_attribute directives in
2010-09-29-mc-asm-header-test.ll are removed because the .fpu
directive already cover the functionality.
* In the Cortex-A15 test case, the value for
Tag_Advanced_SIMD_arch has be changed from 1 to 2,
which is more precise.
llvm-svn: 193524
2013-10-29 01:51:12 +08:00
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; CORTEX-R5: .fpu vfpv3-d16
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2013-10-08 00:55:23 +08:00
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; CORTEX-R5: .eabi_attribute 20, 1
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; CORTEX-R5: .eabi_attribute 21, 1
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; CORTEX-R5: .eabi_attribute 23, 3
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; CORTEX-R5: .eabi_attribute 24, 1
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; CORTEX-R5: .eabi_attribute 25, 1
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2013-11-01 19:21:16 +08:00
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; CORTEX-R5: .eabi_attribute 27, 1
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; CORTEX-R5-NOT: .eabi_attribute 28
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2013-11-12 18:38:05 +08:00
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; CORTEX-R5-NOT: .eabi_attribute 36
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2013-11-01 21:27:35 +08:00
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; CORTEX-R5-NOT: .eabi_attribute 42
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2013-10-08 00:55:23 +08:00
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; CORTEX-R5: .eabi_attribute 44, 2
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2013-11-01 21:27:35 +08:00
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; CORTEX-R5-NOT: .eabi_attribute 68
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2013-10-08 00:55:23 +08:00
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; CORTEX-A53: .cpu cortex-a53
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; CORTEX-A53: .eabi_attribute 6, 14
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; CORTEX-A53: .eabi_attribute 7, 65
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; CORTEX-A53: .eabi_attribute 8, 1
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; CORTEX-A53: .eabi_attribute 9, 2
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2013-10-14 21:16:57 +08:00
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; CORTEX-A53: .fpu crypto-neon-fp-armv8
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; CORTEX-A53: .eabi_attribute 12, 3
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2013-10-08 00:55:23 +08:00
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; CORTEX-A53: .eabi_attribute 24, 1
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; CORTEX-A53: .eabi_attribute 25, 1
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2013-11-01 19:21:16 +08:00
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; CORTEX-A53-NOT: .eabi_attribute 27
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; CORTEX-A53-NOT: .eabi_attribute 28
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2013-11-12 18:38:05 +08:00
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; CORTEX-A53: .eabi_attribute 36, 1
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2013-11-01 21:27:35 +08:00
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; CORTEX-A53: .eabi_attribute 42, 1
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2014-01-20 18:18:42 +08:00
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; CORTEX-A53-NOT: .eabi_attribute 44
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2013-11-01 21:27:35 +08:00
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; CORTEX-A53: .eabi_attribute 68, 3
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2013-09-13 19:51:52 +08:00
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2013-10-14 21:17:07 +08:00
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; CORTEX-A57: .cpu cortex-a57
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; CORTEX-A57: .eabi_attribute 6, 14
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; CORTEX-A57: .eabi_attribute 7, 65
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; CORTEX-A57: .eabi_attribute 8, 1
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; CORTEX-A57: .eabi_attribute 9, 2
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; CORTEX-A57: .fpu crypto-neon-fp-armv8
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; CORTEX-A57: .eabi_attribute 12, 3
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; CORTEX-A57: .eabi_attribute 24, 1
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; CORTEX-A57: .eabi_attribute 25, 1
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2013-11-01 19:21:16 +08:00
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; CORTEX-A57-NOT: .eabi_attribute 27
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; CORTEX-A57-NOT: .eabi_attribute 28
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2013-11-12 18:38:05 +08:00
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; CORTEX-A57: .eabi_attribute 36, 1
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2013-11-01 21:27:35 +08:00
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; CORTEX-A57: .eabi_attribute 42, 1
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2014-01-20 18:18:42 +08:00
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; CORTEX-A57-NOT: .eabi_attribute 44
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2013-11-01 21:27:35 +08:00
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; CORTEX-A57: .eabi_attribute 68, 3
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2013-10-14 21:17:07 +08:00
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2010-09-30 10:45:56 +08:00
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define i32 @f(i64 %z) {
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ret i32 0
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}
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