forked from OSchip/llvm-project
95 lines
3.5 KiB
LLVM
95 lines
3.5 KiB
LLVM
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; RUN: llc < %s | FileCheck %s
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target datalayout = "e-p:64:64-i64:64-n32:64"
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target triple = "powerpc64le-linux"
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%struct.BSS1.0.9.28.39.43.46.47.54.56.57.64.65.69.71.144 = type <{ [220 x i8] }>
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@.BSS1 = external unnamed_addr global %struct.BSS1.0.9.28.39.43.46.47.54.56.57.64.65.69.71.144, align 32
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; Function Attrs: noinline nounwind
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define void @ety2_() #0 {
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; This test case used to crash because the preinc prep pass would assume that
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; if X-Y could be simplified to a constant, than so could Y-X. While not
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; desirable, we cannot actually make this guarantee.
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; CHECK-LABEL: @ety2_
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L.entry:
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%0 = load i32, i32* undef, align 4
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%1 = sext i32 %0 to i64
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%2 = shl nsw i64 %1, 3
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%3 = add nsw i64 %2, 8
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br label %L.LB1_425
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L.LB1_425: ; preds = %L.LB1_427, %L.entry
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%4 = phi i64 [ %21, %L.LB1_427 ], [ undef, %L.entry ]
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br i1 undef, label %L.LB1_427, label %L.LB1_816
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L.LB1_816: ; preds = %L.LB1_425
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switch i32 undef, label %L.LB1_432 [
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i32 30, label %L.LB1_805
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i32 10, label %L.LB1_451
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i32 20, label %L.LB1_451
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]
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L.LB1_451: ; preds = %L.LB1_816, %L.LB1_816
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unreachable
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L.LB1_432: ; preds = %L.LB1_816
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%.in.31 = lshr i64 %4, 32
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%5 = trunc i64 %.in.31 to i32
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br i1 undef, label %L.LB1_769, label %L.LB1_455
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L.LB1_455: ; preds = %L.LB1_432
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unreachable
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L.LB1_769: ; preds = %L.LB1_432
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%6 = sext i32 %5 to i64
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%7 = add nsw i64 %6, 2
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%8 = add nsw i64 %6, -1
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%9 = mul i64 %8, %1
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%10 = add i64 %9, %7
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%11 = shl i64 %10, 3
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%12 = getelementptr i8, i8* undef, i64 %11
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%13 = mul nsw i64 %6, %1
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%14 = add i64 %7, %13
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%15 = shl i64 %14, 3
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%16 = getelementptr i8, i8* undef, i64 %15
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br i1 undef, label %L.LB1_662, label %L.LB1_662.prol
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L.LB1_662.prol: ; preds = %L.LB1_662.prol, %L.LB1_769
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%indvars.iv.next20.prol = add nuw nsw i64 undef, 1
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br i1 undef, label %L.LB1_662, label %L.LB1_662.prol
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L.LB1_662: ; preds = %L.LB1_437.2, %L.LB1_662.prol, %L.LB1_769
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%indvars.iv19 = phi i64 [ %indvars.iv.next20.3, %L.LB1_437.2 ], [ 0, %L.LB1_769 ], [ %indvars.iv.next20.prol, %L.LB1_662.prol ]
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%indvars.iv.next20 = add nuw nsw i64 %indvars.iv19, 1
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%17 = mul i64 %indvars.iv.next20, %3
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%18 = getelementptr i8, i8* %16, i64 %17
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%19 = bitcast i8* %18 to double*
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store double 0.000000e+00, double* %19, align 8
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%indvars.iv.next20.1 = add nsw i64 %indvars.iv19, 2
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%20 = mul i64 %indvars.iv.next20.1, %3
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br i1 undef, label %L.LB1_437.2, label %L.LB1_824.2
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L.LB1_427: ; preds = %L.LB1_425
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%21 = load i64, i64* bitcast (i8* getelementptr inbounds (%struct.BSS1.0.9.28.39.43.46.47.54.56.57.64.65.69.71.144, %struct.BSS1.0.9.28.39.43.46.47.54.56.57.64.65.69.71.144* @.BSS1, i64 0, i32 0, i64 8) to i64*), align 8
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br label %L.LB1_425
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L.LB1_805: ; preds = %L.LB1_816
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ret void
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L.LB1_824.2: ; preds = %L.LB1_662
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%22 = getelementptr i8, i8* %12, i64 %20
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%23 = bitcast i8* %22 to double*
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store double 0.000000e+00, double* %23, align 8
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br label %L.LB1_437.2
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L.LB1_437.2: ; preds = %L.LB1_824.2, %L.LB1_662
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%indvars.iv.next20.3 = add nsw i64 %indvars.iv19, 4
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br label %L.LB1_662
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}
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attributes #0 = { noinline nounwind }
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